Third IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems最新文献

{"title":"Error Protecting Characteristics Of CDMA And Impacts On Speech","authors":"D. Cypher, S. Wakid, J. Bose, D. Vaman","doi":"10.1109/HPCS.1995.662019","DOIUrl":"https://doi.org/10.1109/HPCS.1995.662019","url":null,"abstract":"A Code Division Multiple Access (CDMA) wireless network is simulated to analyze errors, determine impact on services, and provide an upper bound on the number of active channels. The simulation emphasizes the encoder, decoder/correlator, and a threshold detector; but assumes a resultant Gaussian function for the “air interface ‘ I noise. Since the characteristics of a wireless environment vary significantly, we examine, as a whole, the errors on the received signal without accounting for spec@ error contributions from power, fading, propagation, interference from other users, and other factors in such environment. The CDMA encoder uses the 64 Walsh codes that are spec@ied in the dra$ Wideband CDMA Air Inte$ace Compatibility Standard for 1.85 to 1.99 GHz PCS Applications [l]. We use a digitized actual speech database to test for the intelligibility of the voice service over such a CDMA air inteflace. Therefore, we are able to leam about the nature of the errors inherent in such a Ji-equency spreading technique and also determine an upper bound on the simultaneous active channels that would preserve the quality of service (QOS).","PeriodicalId":174670,"journal":{"name":"Third IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"PP 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126676298","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Parallel Computing On High-Speed Wide-Area Networks: A Pricing Policy For Its Communication Needs","authors":"A. Heddaya, Kihong Park","doi":"10.1109/HPCS.1995.662027","DOIUrl":"https://doi.org/10.1109/HPCS.1995.662027","url":null,"abstract":"With the advent of high-speed communication infrastructures comprising local-area and widearea networks linking together a large number of high-performance workstations, harnessing their collective power for parallel computing has become a viable goal. Parallel computing applications constitute a broad class ranging from traditional supercomputing applicutions including partial differential equations and global weather simulation, to molecular sequence analysis and a host of esoteric applications such as those arising in distributed AI. Whether the underlying parallelism is functional or data pamllF1, most applications require some form of synchronization mechanism to ensure the correctness of the concurrent computation. In the case of fized-point problems amenable to asynchronous iterative algorithms. the computation phase need not wait for the communication phase to deliver up-to-date information before proceeding. Under relatively weak conditions on the message delay. convcrgencc to solution can be guaranteed. In general, such \"asynchrony\" at the computation level cannot be tolerated, and a principal concern when implementing parallel applications over LAN/WAN distributed systems is the minimization of synchronization penalty caused by uneven load distribution and variation in network delay. In this paper, we exclusively deal with the issues surrounding the control of communication delay. In previous work [3]. we have investigated the detrimental effect of inadequately controlled network contention on the performance of parallel applications in a LAN environment. Figure 1 (left) shows the high delay variation associated with messages when only an Isis-native congestion control is active. Figure 1 (right) shows the \"tamed)' behavior when warp control [5] is applied, resulting in several factors speed-up of application performance. The adverse effect of communication cost in a WAN environment in the context of performing molecular sequence analysis is reported in [6]. Although a host of congestion control algorithms have been proposed in the literature for ATM based B-ISDN. it is far from clear which algorithms are superior, and in what sense. We propose and analyze a set of strucfuml requirements sufficient for the effective control of communication delay over high-speed wide-area networks for facilitating parallel applications. The structural requirements are applicable to both rate-based and link-based congestion control schemes, affecting the architectural organization of the communication subsystems to be deployed for the expected \"infobahn .'.","PeriodicalId":174670,"journal":{"name":"Third IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127203105","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"An Approach To The Design And Implementation Of ATM Virtual Private Networks","authors":"M. Bonsignono, A. Cappellari, P. Coppo, M. D'Ambrosio, V. Vercellone","doi":"10.1109/HPCS.1995.662015","DOIUrl":"https://doi.org/10.1109/HPCS.1995.662015","url":null,"abstract":"An approach to the design and implementation of ATM Virtual Private Networks M. Bonsignorio. A. Cappellari. P. Coppo. M. DAmbrosio. V. Vercellone CSELT via G. k i s s Romoli. 274 Tel: +39 11 2285 11 1 Fax: +39 11 2285069 E-Mail: Vinicio.Vercellone@cselt.stet.it 1-10148 TOMO (Italy) The paper discusses the architecture concepts and performance d a dedicated unit that caa be used. in addition to an A’M Gass-Comect. in order to support the essential features far the deployment of an ATM Via l Private Network .service (A-VPN service). Ihe A-VPN Server aims to provide an &iient solution fn &e bandwidth assignment and wnuol issues. generally referred as the egtess poking problem. involved in this application: it iDcorporates a effective statistical multiplexing p k i p l e OII the different cell s . by means d suitable buffering. shaping and selective aaffic discarding functions. The solution described allows f a aa improved and peak rate ~ ~ ~ O Z N ~ O Q while easuring that satisfactory Quality d Service requirements are matcbed when handling bursty traffic. The Senter is able to grow according to a modular architecture and its in&tiao has no spedal impact an the standard functias cf the basic ATM switch; m m e r it Qes not quire the support d particular management protocols by the node. In essethe A-WN Server represents a simple and cost-effective solution f a statistical multiplexing d bursty traf5c. enabling a timely hplementatian d the set af f u n c t i d t i e s & v d to tbe support d an optimised utilisation dottwak r e s a m e S . compared to","PeriodicalId":174670,"journal":{"name":"Third IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131250279","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Modular VLSI Implementation Architecture For The Scalable Provision Of High-Performance Multimedia Multipoint Services","authors":"G. Carle, J. Schiller","doi":"10.1109/HPCS.1995.662000","DOIUrl":"https://doi.org/10.1109/HPCS.1995.662000","url":null,"abstract":"Emerging applications mostly require both, high performance as well as support of a wide variety of communication services. For example, audio, video, and data transmission may require highly different services. An additional challenge arises by the growing demand for multipoint communication services. ATM networks are capable of satisfying the basic application requirements by providing multipoint bearer services [ 11 with guaranteed quality of service at data rates exceeding a gigabit per second. However, current communication subsystems (including higher layer protocols) that provide reliable services are not able to deliver the available network perfomance to the applications [Z], [3]. They also face difficulties in supporting the service guarantees provided by the ATM network. In particular in multipoint communication scenarios of multimedia applications, severe degradations of service quality may be observed. To provide high performance multimedia multipoint services, suited implementations of communication subsystems are increasingly required [4], [5 ] . They may comprise of dedicated VLSI components for time-critical processing tasks, such as retransmission support or memory management. In the paper, a framework for the provision of multipoint multimedia services in ATM networks and heterogeneous internetwork is presented. It provides support for processing of layer 3 and 4 protocol functions in end and intermediate systems for enhancing the network bearer service. The use of dedicated hardware components for network and transport layer processing allows for the provision of reliable services with puaranteed quality of service, without requiring radical changes in the operating system of existing computer platfomis. The paper presents how dedicated hardware components for network and transport layer functions may be integrated into end systems, as well as in dedicated intermediate systems with error control called Group Communication Servers. A modular VLSI implementation architecture designed around specialized components is presented that allows for service flexibility. The components can be reprogrammed using microprograms and may be selected individually depending on the service required by the application. The architecture is specifically designed for implementing complex connection oriented protocols with advanced protocol mechanisms [6 1, [7]. Specific support for processing intensive functions is given. For example, selective retransmission is provided by a dedicated VLSI component. The architecture is highly independent of the specific protocol to be implemented and, thus, forms a general implementation platform for high-perfomlance communication protocols. The Xpress Transfer Protocol (XTP) [8] is a good candidate for the envisaged applications.","PeriodicalId":174670,"journal":{"name":"Third IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115470008","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Multimedia Applications Should Be Adaptive","authors":"C. Diot, C. Huitema, T. Turletti","doi":"10.1109/HPCS.1995.662016","DOIUrl":"https://doi.org/10.1109/HPCS.1995.662016","url":null,"abstract":"Multimedia applications request timely transmission of their data. This translates into requirement that networks provide a sufficient \"Quality of Service\" (or QoS). Introducing QoS guarantees in the communication support has various consequences on the way data are transmitted through the network. Requirements on efficiency start at the higher level protocols (end-to-end control) by applying new high performance implementation techniques; but also by re-considering the classic layered communication architecture. In a 1990 communication to the SIGCOMM conference, D. Clark and D. Tennenhouse pointed out the performance implication of this design choice [Clark90]. They proposed two architectural principles, Application Level Framing (or ALF) and Integrated Layer Processing (or ILP). The direct consequence of such new implementation techniques should be reduced bottlenecks in the end-to-end layers and more control given to the application to express its requirements.","PeriodicalId":174670,"journal":{"name":"Third IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127213548","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Networking Support For Large Scale Multiprocessor Servers","authors":"David J. Yates, E. Nahum, J. Kurose, D. Towsley","doi":"10.1145/233013.233032","DOIUrl":"https://doi.org/10.1145/233013.233032","url":null,"abstract":"Over the next several years the performance demands on globally available information servers are expected to increase dramatically. These servers must be capable of sending and receiving data over hundreds or even thousands of simultaneous connections. In this paper, we show that connection-level parallel protocols (where different connections are processed in parallel) running on a shared-memory multiprocessor can deliver high network bandwidth across a large number of connections.We experimentally evaluate connection-level parallel implementations of both TCP/IP and UDP/IP protocol stacks. We focus on three questions in our performance evaluation: how throughput scales with the number of processors, how throughput changes as the number of connections increases, and how fairly the aggregate bandwidth is distributed across connections. We show how several factors impact performance: the number of processors used, the number of threads in the system, the number of connections assigned to each thread, and the type of protocols in the stack (i.e., TCP versus UDP).Our results show that with careful implementation connection-level parallel protocol stacks scale well with the number of processors, and deliver high throughput which is, for the most part, sustained as the number of connections increases. Maximizing the number of threads in the system yields the best overall throughput. However, the best fairness behavior is achieved by matching the number of threads to the number of processors and scheduling connections assigned to threads in a round-robin manner.","PeriodicalId":174670,"journal":{"name":"Third IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129409383","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Comparison Of Media Scaling Techniques For Real-Time Packet Video Transport","authors":"S. Gumbrich, J. Sandvoss","doi":"10.1109/HPCS.1995.662013","DOIUrl":"https://doi.org/10.1109/HPCS.1995.662013","url":null,"abstract":"Scaling is a techniquc that allows for the dynamic adjustment of media s t r m s like variablc-bit-rate video to the currently available network capacity. Prcrcquisite for scaling is media scaling, i.e. a techniquc to adjust thc bandwidth of a media stream. In this paper wc analysc and compare different media scaling mechanisms for vidco transmission. The goal is a scheme that allows for rapid adaptation of thc bandwidth to a given continously changing value. Simultancosly thc optimiration of the video quality is achieved.","PeriodicalId":174670,"journal":{"name":"Third IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117303044","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Hierarchical Mapping Of Enhanced QoS Parameters Based On OSI Protocols","authors":"B. Stiller","doi":"10.1109/HPCS.1995.662004","DOIUrl":"https://doi.org/10.1109/HPCS.1995.662004","url":null,"abstract":"","PeriodicalId":174670,"journal":{"name":"Third IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134524758","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Testing The ATM Based 34/155Mbps-Wissenschafts-Netz (WiN) In Germany","authors":"P. Holleczek","doi":"10.1109/HPCS.1995.662029","DOIUrl":"https://doi.org/10.1109/HPCS.1995.662029","url":null,"abstract":"","PeriodicalId":174670,"journal":{"name":"Third IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123859445","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"The Multi-Protocol Gigabit-Per-Second Isochronet Switch Design And Implementation","authors":"D. Florissi, Y. Yemini","doi":"10.1109/HPCS.1995.662032","DOIUrl":"https://doi.org/10.1109/HPCS.1995.662032","url":null,"abstract":"This paper overviews rhe elecrronic design and implementation of a switch based on the Isochronets high-speed rietwork archirecrure. Isochroners swirch rouies over time. Frames follow enabled routes withour slopping or intermediate nodes for frame header processing. The absence of such processing in (he Isochroners archirecrure is core for the switch f lciency and multi-protocol support. The switch makes possible Qualiry of Service (QoS) negotiation while promoting flexible resource sharing. The modular design is scaleable in number of nodes and link speed. I t can potentially reach scores of gigabits per second using current electronic iechnology. The switch implementation is simple and uses only ofl-(he-shelf componenrs. The switch interface provides novel services such QoS negotiation, mulri-prorocol frame forwarding, and synchronous service support for periphery protocol stacks. High-speed Networks (HSNs) place unprecedented challenges in a candidate switching technology. Switches have to be efficient both in terms of internal latency and throughput. Link throughput is rapidly evolving towards hundreds of gigabits per second or even scores of terabits per second. In such scenario, intemal latency must be of a few nanoseconds. Besides being efficicnt, an adequatc switching mechanism for HSNs must maximize bandwidth use while guaranteeing the necessary Quality of Service (QoS) that integrated data voice, and video applications need. This paper describes the design and implementation of a switch using the Isochronets architecture [4] that embodies a solution for these challenges. Current switching techniques. Packet Switching (PS) and Circuit Switching (CS) [I], may not appropriately satisfy these goals. For example, PS has limited support for guaranteed QoS, while CS enables limited bandwidth sharing. The reminder of this section introduccs thc main challenges in designing and implementing a HSN switch. Swiiching efficiency. Currcnt switching techniques rely on the fact that processing efficiency significantly prevails msmission effcicncy. Unfortunately, the scenario is likely to change when HSN link speeds reach hundreds of gigabits or even terabits per second. It may become difficult to process frame headers or synchronize sources and destinations at these speeds. QoS guaranrees. HSN switches must be able to support a variety of QoS needs in terms of maximum endend delay, jitter. loss, and bandwidth allocation. These parameters must be tunable by sources. Scalabifiry in speed. Link spceds have been increasing very rapidly in recent years and are expected to continue the trend with advances in optical transmissions. It is thus advisable not to base the switch design on peculiarity of specific muismission rates. Scalability in fhe nirmber olporrs. Scalability in the number of ports has always been an issue in switch design. Network systems are continuously growing and switches must be scaled accordingly. Implementation complexip and cosr. The p","PeriodicalId":174670,"journal":{"name":"Third IEEE Workshop on the Architecture and Implementation of High Performance Communication Subsystems","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-08-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132578624","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}