{"title":"Contact Information","authors":"Katrina Jessoe, E. Spang","doi":"10.1109/fdtc51366.2020.00008","DOIUrl":"https://doi.org/10.1109/fdtc51366.2020.00008","url":null,"abstract":"","PeriodicalId":168420,"journal":{"name":"2020 Workshop on Fault Detection and Tolerance in Cryptography (FDTC)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123136922","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Vincent Werner, Laurent Maingault, Marie-Laure Potet
{"title":"An End-to-End Approach for Multi-Fault Attack Vulnerability Assessment","authors":"Vincent Werner, Laurent Maingault, Marie-Laure Potet","doi":"10.1109/FDTC51366.2020.00009","DOIUrl":"https://doi.org/10.1109/FDTC51366.2020.00009","url":null,"abstract":"Although multi-fault attacks are extremely powerful in defeating sophisticated hardware and software defences, detecting and exploiting such attacks remains a difficult problem, especially without any prior knowledge of the target. Our main contribution is an end-to-end approach for multi-fault attack vulnerability assessment We take advantage of target specific fault models rather than generic fault models to achieve complex multi-fault attacks that can lead to critical vulnerabilities. Target specific fault models are generated thanks to fault models inference process, based on a fault injections simulation and a characterization, in order to elaborate powerful multi-fault attacks based on different fault models. Combining fault models opens up new possible attack paths and adds flexibility to design fault attacks that adapt to countermeasures. Hence, the direct consequence of the increasing complexity of fault attacks question the effectiveness of software countermeasures based on generic fault models for sensitive applications.","PeriodicalId":168420,"journal":{"name":"2020 Workshop on Fault Detection and Tolerance in Cryptography (FDTC)","volume":"269 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123486950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"SiliconToaster: A Cheap and Programmable EM Injector for Extracting Secrets","authors":"K. M. Abdellatif, Olivier Hériveaux","doi":"10.1109/FDTC51366.2020.00012","DOIUrl":"https://doi.org/10.1109/FDTC51366.2020.00012","url":null,"abstract":"Electromagnetic Fault Injection (EMFI) is considered as an effective fault injection technique for the purpose of conducting physical attacks against integrated circuits. It enables an adversary to inject errors on a circuit to gain knowledge of sensitive information or to bypass security features. The aim of this paper is to highlight the design and validation of SiliconToaster, which is a cheap and programmable platform for EM pulse injection. It has been designed using low-cost and accessible components that can be easily found. In addition, it can inject faults with a programmable voltage up to 1.2kV without the need to an external power supply as it is powered by the USB. The second part of the paper invests the SiliconToaster in order to bypass the firmware security protections of STM32F2 microcontroller. Two security levels were bypassed sequentially for the first time in a non-invasive way (without chip decapsulation).","PeriodicalId":168420,"journal":{"name":"2020 Workshop on Fault Detection and Tolerance in Cryptography (FDTC)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117145874","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Etienne Boespflug, Cristian Ene, L. Mounier, Marie-Laure Potet
{"title":"Countermeasures Optimization in Multiple Fault-Injection Context","authors":"Etienne Boespflug, Cristian Ene, L. Mounier, Marie-Laure Potet","doi":"10.1109/FDTC51366.2020.00011","DOIUrl":"https://doi.org/10.1109/FDTC51366.2020.00011","url":null,"abstract":"Fault attacks consist in changing the program behavior by injecting faults at run-time, either at hardware or at software level. Their goal is to change the correct progress of the algorithm and hence, either to allow gaining some privilege access or to allow retrieving some secret information based on an analysis of the deviation of the corrupted behavior with respect to the original one. Countermeasures have been proposed to protect embedded systems by adding spatial, temporal or information redundancy at hardware or software level. First we define Countermeasures Check Point (CCP) and CCPs-based countermeasures as an important subclass of countermeasures. Then we propose a methodology to generate an optimal protection scheme for CCPs-based countermeasure. Finally we evaluate our work on a benchmark of code examples with respect to several Control Flow Integrity (CFI) oriented existing protection schemes.","PeriodicalId":168420,"journal":{"name":"2020 Workshop on Fault Detection and Tolerance in Cryptography (FDTC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130893387","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Title Page I","authors":"","doi":"10.1109/fdtc51366.2020.00001","DOIUrl":"https://doi.org/10.1109/fdtc51366.2020.00001","url":null,"abstract":"","PeriodicalId":168420,"journal":{"name":"2020 Workshop on Fault Detection and Tolerance in Cryptography (FDTC)","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126870129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Menu, J. Dutertre, J. Rigaud, Brice Colombier, Pierre-Alain Moëllic, J. Danger
{"title":"Single-bit Laser Fault Model in NOR Flash Memories: Analysis and Exploitation","authors":"A. Menu, J. Dutertre, J. Rigaud, Brice Colombier, Pierre-Alain Moëllic, J. Danger","doi":"10.1109/FDTC51366.2020.00013","DOIUrl":"https://doi.org/10.1109/FDTC51366.2020.00013","url":null,"abstract":"Laser injection is a powerful fault injection technique with a high spatial accuracy which allows an adversary to efficiently extract the secret information from an electronic device. The control and the repeatability of faults requires the attacker to understand the relation of the fault model to the setup (notably the laser spot size) and the process node of the target device. Most studies on laser fault injection report fault models resulting from a photo-electric current in CMOS transistors. This study provides a black-box analysis of the effect of a photo-electric current in floating-gate transistors of two embedded NOR Flash memories from two different manufacturers. Experimental results demonstrate that single-bit bit-set faults can be injected in code and data without corrupting the Flash memory, even with a laser spot of more than 20 µm in diameter, which is several orders of magnitude larger than the process node of the floating-gate transistors in the experiments. This article also presents the specifics of performing a \"safe-error\" attack on AES, leveraging the previously detailed single-bit bit-set fault model.","PeriodicalId":168420,"journal":{"name":"2020 Workshop on Fault Detection and Tolerance in Cryptography (FDTC)","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124402375","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Acknowledgments","authors":"","doi":"10.1109/fdtc51366.2020.00007","DOIUrl":"https://doi.org/10.1109/fdtc51366.2020.00007","url":null,"abstract":"","PeriodicalId":168420,"journal":{"name":"2020 Workshop on Fault Detection and Tolerance in Cryptography (FDTC)","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115639024","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Copyright","authors":"","doi":"10.1109/fdtc51366.2020.00003","DOIUrl":"https://doi.org/10.1109/fdtc51366.2020.00003","url":null,"abstract":"","PeriodicalId":168420,"journal":{"name":"2020 Workshop on Fault Detection and Tolerance in Cryptography (FDTC)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124436972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Title Page III","authors":"","doi":"10.1109/fdtc51366.2020.00002","DOIUrl":"https://doi.org/10.1109/fdtc51366.2020.00002","url":null,"abstract":"","PeriodicalId":168420,"journal":{"name":"2020 Workshop on Fault Detection and Tolerance in Cryptography (FDTC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131198472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Yrjo Koyen, Adriaan Peetermans, Vladimir Rožić, I. Verbauwhede
{"title":"Attacking Hardware Random Number Generators in a Multi-Tenant Scenario","authors":"Yrjo Koyen, Adriaan Peetermans, Vladimir Rožić, I. Verbauwhede","doi":"10.1109/FDTC51366.2020.00010","DOIUrl":"https://doi.org/10.1109/FDTC51366.2020.00010","url":null,"abstract":"True random number generators are important building blocks for cryptographic systems and can be the target of adversaries that want to break cryptographic protocols by reducing the unpredictability of the used random numbers. This paper examines the viability of three different types of potential attacks on these generators when they are implemented on field programmable gate arrays, namely the voltage manipulation attack, the ring-oscillator locking attack and the replica observation attack. The proposed attacks only make use of the available programmable logic of the device and as such do not require physical access to it. They can technically be mounted remotely in a multi-tenant scenario by adversaries that only have bitstream write access to a part of the programmable logic. The attacks try to exploit interactions that can exist between an attack circuit and the targeted circuit because they reside on the same chip. The paper presents two case studies: an elementary ring oscillator design and a transition effect ring oscillator design. For the first case study, all three scenarios were tested and for the second case study, only the voltage manipulation attack scenario is examined. Our results show that this voltage manipulation attack is the most effective of the three proposed attacks.","PeriodicalId":168420,"journal":{"name":"2020 Workshop on Fault Detection and Tolerance in Cryptography (FDTC)","volume":"157 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121047851","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}