2013 13th International Conference on Application of Concurrency to System Design最新文献

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LTL Model Checking of Parallel Programs with Under-Approximated TSO Memory Model 欠逼近TSO内存模型下并行程序的LTL模型检验
J. Barnat, L. Brim, Vojtech Havel
{"title":"LTL Model Checking of Parallel Programs with Under-Approximated TSO Memory Model","authors":"J. Barnat, L. Brim, Vojtech Havel","doi":"10.1109/ACSD.2013.8","DOIUrl":"https://doi.org/10.1109/ACSD.2013.8","url":null,"abstract":"Model checking of parallel programs under relaxed memory models has been so far limited to the verification of safety properties. Tools have been developed to automatically synthesise correct placement of synchronisation primitives to reinstate the sequential consistency. However, in practice it is not the sequential consistency that is demanded, but the correctness of the program with respect to its specification. In this paper, we introduce a new explicit-state Linear Temporal Logic model checking procedure that allows for full verification of programs under approximated Total Store Ordering memory model. We also present a workflow of automated procedure to place the synchronisation primitives into the system under inspection to make it satisfy the given specification under the approximated memory model. Our experimental evaluation has been conducted within DiVinE, our parallel and distributed-memory LTL model checker.","PeriodicalId":166715,"journal":{"name":"2013 13th International Conference on Application of Concurrency to System Design","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114730706","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Precision Timed Embedded Systems Using TickPAD Memory 使用TickPAD内存的精确定时嵌入式系统
Matthew M. Y. Kuo, P. Roop, Sidharta Andalam, N. Patel
{"title":"Precision Timed Embedded Systems Using TickPAD Memory","authors":"Matthew M. Y. Kuo, P. Roop, Sidharta Andalam, N. Patel","doi":"10.1109/ACSD.2013.30","DOIUrl":"https://doi.org/10.1109/ACSD.2013.30","url":null,"abstract":"There has been a great deal of impetus for the design of predictable memory such as scratchpad memory. Moreover, static analysis of cache memory is an area of intense research activity. However, there has been minimal development of caches or scratchpads (SPMs) that can exploit the inherent concurrency in synchronous languages. In this paper, we have developed a new memory subsystem, called the TPM (TickPAD memory), for predictable and efficient execution of synchronous programs. TPMs are a hybrid between conventional caches and SPMs: they support dynamic loading of cache lines (like caches) and static allocation of program points (like SPMs). However, the dynamic loading is predictably managed through statically loaded TPM commands. Extensive benchmarking comparing TPMs to SPMs and direct mapped caches reveal that TPM achieves 8.5% WCRT reduction compared to locked SPMs, 12.3% WCRT reduction compared to thread multiplexed SPM and 13.4% WCRT reduction compared to direct mapped caches, while also keeping the analysis time comparatively small.","PeriodicalId":166715,"journal":{"name":"2013 13th International Conference on Application of Concurrency to System Design","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127534787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Bounded Model Checking of an MITL Fragment for Timed Automata 时间自动机MITL片段的有界模型检验
R. Kindermann, Tommi A. Junttila, I. Niemelä
{"title":"Bounded Model Checking of an MITL Fragment for Timed Automata","authors":"R. Kindermann, Tommi A. Junttila, I. Niemelä","doi":"10.1109/ACSD.2013.25","DOIUrl":"https://doi.org/10.1109/ACSD.2013.25","url":null,"abstract":"Timed automata (TAs) are a common formalism for modeling timed systems. Bounded model checking (BMC) is a verification method that searches for runs violating a property using a SAT or SMT solver. MITL is a real-time extension of the linear time logic LTL. Originally, MITL was defined for traces of non-overlapping time intervals rather than the \"super-dense\" time traces allowing for intervals overlapping in single points that are employed by the nowadays common semantics of timed automata. In this paper we extend the semantics of a fragment of MITL to super-dense time traces and devise a bounded model checking encoding for the fragment. We prove correctness and completeness in the sense that using a sufficiently large bound a counter-example to any given non-holding property can be found. We have implemented the proposed bounded model checking approach and experimentally studied the efficiency and scalability of the implementation.","PeriodicalId":166715,"journal":{"name":"2013 13th International Conference on Application of Concurrency to System Design","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125342863","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
Queue-Dispatch Asynchronous Systems 队列调度异步系统
G. Geeraerts, Alexander Heußner, Jean-François Raskin
{"title":"Queue-Dispatch Asynchronous Systems","authors":"G. Geeraerts, Alexander Heußner, Jean-François Raskin","doi":"10.1109/ACSD.2013.18","DOIUrl":"https://doi.org/10.1109/ACSD.2013.18","url":null,"abstract":"To make the development of efficient multi-core applications easier, libraries, such as Grand Central Dispatch (GCD), have been proposed. When using such a library, the programmer writes so-called blocks, which are chunks of codes, and dispatches them, using synchronous or asynchronous calls, to several types of waiting queues. A scheduler is then responsible for dispatching those blocks on the available cores. Blocks can synchronize via a global memory. In this paper, we propose Queue-Dispatch Asynchronous Systems as a mathematical model that faithfully formalizes the synchronization mechanisms and the behavior of the scheduler in those systems. We study in detail their relationships to classical formalisms such as pushdown systems, Petri nets, fifo systems, and counter systems. Our main technical contributions are precise worst-case complexity results for the Parikh coverability problem and the termination question for several subclasses of our model. We give an outlook on extending our model towards verifying input-parametrized fork- join behaviour with the help of abstractions, and conclude with a hands-on approach for verifying GCD programs in practice.","PeriodicalId":166715,"journal":{"name":"2013 13th International Conference on Application of Concurrency to System Design","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-01-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114961453","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
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