{"title":"A novel compression methodology for medical images using deep learning for high-speed transmission","authors":"Shyamala Navaneethakrishnan, G. Shanmugam","doi":"10.11591/ijres.v13.i2.pp262-270","DOIUrl":"https://doi.org/10.11591/ijres.v13.i2.pp262-270","url":null,"abstract":"Medical imaging is a rapidly growing field having a high impact on the early detection, diagnosis and surgical planning of diseases. Several imaging techniques such as computed tomography (CT), magnetic resonance imaging (MRI) and ultrasound (US) imaging generate a higher volume of data, necessitating additional storage and communication requirements. Hence, image compression is utilized in medical field to reduce redundancy and alleviate memory and bandwidth issues. This paper presents a novel deep learning-based compression method to reduce the size of medical images. This method employs a deep convolutional neural network for learning compact representations of medical images, then coded by a Huffman encoder. The compression process is reversed to reconstruct the original image. Several tests are conducted to compare the results with other wellknown compression methods. The proposed model achieved a mean peak signal-to-noise ratio (PSNR) of 42.82 dB with storage space saving (SSS) of 96.15% for CT, 43.88 dB with SSS of 96.25% for MRI, 46.29 dB with SSS of 96.07% for US and 43.51 dB with SSS of 96.95% for X-ray images. The findings showed that the proposed compression technique could greatly compress the image size, saving storage space, facilitating better transmission and preserving critical diagnostic information.","PeriodicalId":158991,"journal":{"name":"International Journal of Reconfigurable and Embedded Systems (IJRES)","volume":"176 6","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141694880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An exhaustive review of the stream ciphers and their performance analysis","authors":"Raghavendra Ananth, N. Ramaiah","doi":"10.11591/ijres.v13.i2.pp360-371","DOIUrl":"https://doi.org/10.11591/ijres.v13.i2.pp360-371","url":null,"abstract":"The number of internet of things (IoT) applications has increased, which has increased the demand for low-resource gadgets. The data produced by these devices must be protected to guarantee security. The devices operate in conditions with limited space, computational power, memory, and energy. High-security standards are difficult to achieve with limited resources. The detailed analysis of various stream ciphers and their performance metrics is reviewed in this manuscript. The functionality of the stream ciphers is categorized and thoroughly discussed based on both the hardware and software viewpoints. The security attacks and their countermeasure methods using stream ciphers are discussed. The performance metrics of most hardware-based stream ciphers, including the ECRYPT stream cipher project (eSTREAM) ciphers, are discussed. Each hardware stream cipher design highlights the hardware constraints such as chip area, frequency, throughput, and hardware efficiency. The work also highlights the various applications using these stream ciphers. The current trends using these stream ciphers are discussed with futuristic goals.","PeriodicalId":158991,"journal":{"name":"International Journal of Reconfigurable and Embedded Systems (IJRES)","volume":"2 5","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141709294","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Artificial intelligence-powered intelligent reflecting surface systems countering adversarial attacks in machine learning","authors":"Rajendiran Muthusamy, Charulatha Kannan, Jayarathna Mani, Rathinasabapathi Govindharajan, Karthikeyan Ayyasamy","doi":"10.11591/ijres.v13.i2.pp414-423","DOIUrl":"https://doi.org/10.11591/ijres.v13.i2.pp414-423","url":null,"abstract":"With the increase in the computation power of devices wireless communication has started adopting machine learning (ML) techniques. Intelligent reflecting surface (IRS) is a programmable device that can be used to control electromagnetic wave propagation by changing the electric and magnetic values of its surface. State-of-the-art ML especially on deep learning (DL)-based IRS-enhanced communication is an emerging topic. Yet while integrating IRS with other emerging technologies possibilities of adversarial data creaping is high. Threats to security, their mitigation, and complexes for AI-powered applications in next generation networks are continuously emerging. In this work the ability of an IRS enhanced wireless network in future-generation networks to prevent adversarial machinelearning attacks is studied. The artificial intelligence (AI) model is used to minimize the susceptibility of attacks using defense distillation mitigation technique. The outcome shows that the defensive distillation technique (DDT) increases the strength and performance by around 22% of the AI method under an adversarial attack.","PeriodicalId":158991,"journal":{"name":"International Journal of Reconfigurable and Embedded Systems (IJRES)","volume":"38 8","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141715260","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Agriculture data analysis using parallel k-nearest neighbour classification algorithm","authors":"Vimala Muninarayanappa, Rajeev Ranjan","doi":"10.11591/ijres.v13.i2.pp332-340","DOIUrl":"https://doi.org/10.11591/ijres.v13.i2.pp332-340","url":null,"abstract":"A cost-effective and effective agriculture management system is created by utilizing data analytics (DA), internet of things (IoT), and cloud computing (CC). Geographic information system (GIS) technology and remote sensing predictions give users and stakeholders access to a variety of sensory data, including rainfall patterns and weather-related information (such as pressure, humidity, and temperatures). They have unstructured format for sensory data. The current systems do a poor job of analysing such data since they cannot effectively balance speed and memory usage. An effective categorization model (ECM) on agriculture management system is proposed to address this research difficulty. First, a classification technique called priority-based k-nearest neighbour (KNN) is provided to categorize unstructured multi-dimensional data into a structured form. Additionally, the Hadoop MapReduce (HMR) framework is used to do classification utilizing a parallel approach. Data from real-time IoT sensors used in agriculture is the subject of experiments. The suggested approach significantly outperforms previous approaches that are computing time, memory efficiency, model accuracy, and speedup.","PeriodicalId":158991,"journal":{"name":"International Journal of Reconfigurable and Embedded Systems (IJRES)","volume":"121 24 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141706331","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Performance analysis of microstrip patch antenna for wireless communication systems","authors":"Manjunathan Alagarsamy, Santhakumar Govindasamy, K. Suriyan, Balamurugan Rajangam, Sivarathinabala Mariappan, Jothi Chitra Ratha Krishnan","doi":"10.11591/ijres.v13.i2.pp227-233","DOIUrl":"https://doi.org/10.11591/ijres.v13.i2.pp227-233","url":null,"abstract":"An antenna may be thought of as a temporary tool that directs radio waves for transmission or reception. Aside from being inexpensive, small, easy to manufacture, and compatible with integrated electronics, the microstrip patch antenna (MPA) offers several other benefits as well. These two methods are often seen as low-cost, adaptable, dependable, high-speed data connection choices that promote user mobility. An overview of how MPA have been used throughout the last several decades is provided in this article. It has been suggested that there are many approaches to enhance the performance of MPA, including the use of composite antennas, highly integrated antenna/array and feeding networks, operating at relatively high frequencies, and using cutting-edge manufacturing methods. Dual or multiband antennas are essential for meeting the demands of wireless services in this rapidly evolving wireless communication environment. Here is an overview of the patch antenna literature for wireless local area network (WLAN) and worldwide interoperability for microwave access (WiMAX) applications.","PeriodicalId":158991,"journal":{"name":"International Journal of Reconfigurable and Embedded Systems (IJRES)","volume":"27 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141705386","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Prashant Richhariya, P. Chauhan, Lalit Kane, B. Dewangan
{"title":"Continuous hand gesture segmentation and acknowledgement of hand gesture path for innovative effort interfaces","authors":"Prashant Richhariya, P. Chauhan, Lalit Kane, B. Dewangan","doi":"10.11591/ijres.v13.i2.pp286-295","DOIUrl":"https://doi.org/10.11591/ijres.v13.i2.pp286-295","url":null,"abstract":"Human-computer interaction (HCI) has revolutionized the way we interact with computers, making it more intuitive and user-friendly. It is a dynamic field that has found it is applications in various industries, including multimedia and gaming, where hand gestures are at the forefront. The advent of ubiquitous computing has further heightened the interest in using hand gestures as input. However, recognizing continuous hand gestures presents a set of challenges, primarily stemming from the variable duration of gestures and the lack of clear starting and ending points. Our main objective is to propose a solution: the framework for “continuous palm motion analysis and retrieval” based on “Spatial-temporal and path knowledge”. Framework harnesses the power of cognitive deep learning networks (DLN), offering a significant advancement in the continuous hand gesture recognition domain. we conducted rigorous experiments using a diverse video dataset capturing hand gestures for boasting an impressive F-score of up to 0.99. The potential of our framework to significantly enhance the accuracy and reliability of hand gesture recognition in real-world applications.","PeriodicalId":158991,"journal":{"name":"International Journal of Reconfigurable and Embedded Systems (IJRES)","volume":"394 3","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141707925","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mohd Faris Izzwan Mohd Sayudzi, I. H. Hamzah, A. A. Malik, M. Idris, Z. H. C. Soh, A. F. A. Rahim, N. Hadis
{"title":"FPGA in hardware description language based digital clock alarm system with 24-hr format","authors":"Mohd Faris Izzwan Mohd Sayudzi, I. H. Hamzah, A. A. Malik, M. Idris, Z. H. C. Soh, A. F. A. Rahim, N. Hadis","doi":"10.11591/ijres.v13.i2.pp244-252","DOIUrl":"https://doi.org/10.11591/ijres.v13.i2.pp244-252","url":null,"abstract":"Currently, digital clock adapts microprocessor or microcontroller system. Performance of speed and reconfigurability issue become a main concern in digital clocks. New additional feature may be introduced in digital clocks in the future. Field programmable gate array (FPGA) offer better performance of speed and reconfiguration features. Based on these advantages, it is essential to study or explore the digital clock with FPGA design. The objective in this study is to create a hardware description language (HDL)- based digital clock with alarm system and implement it onto the Altera DE2- 115 board. Using Verilog HDL language in Quartus Prime 20.1 Lite Edition software, all submodule components is developed and being test benched using ModelSim-Altera Starter Edition 13.1 to ensure the correct functionality. Then all inputs and outputs will be assigned through pin assignment in the software. For verification purpose, it will be downloaded to the Altera DE2-115 board. In conclusion, the file has been successfully implemented to the board and the digital clock with alarm is fully functional as expected. This was proved by the alarm signal, time adjustment and display of the three-display mode which is clock, alarm, and input where each mode carries their own functions as expected.","PeriodicalId":158991,"journal":{"name":"International Journal of Reconfigurable and Embedded Systems (IJRES)","volume":"21 6","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141711844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An efficient floating point adder for low-power devices","authors":"Manjula Narayanappa, S. S. Yellampalli","doi":"10.11591/ijres.v13.i2.pp253-261","DOIUrl":"https://doi.org/10.11591/ijres.v13.i2.pp253-261","url":null,"abstract":"With an increasing demand for power hungry data intensive computing, design methodologies with low power consumption are increasingly gaining prominence in the industry. Most of the systems operate on critical and noncritical data both. An attempt to generate a precision result results in excessive power consumption and results in a slower system. An attempt to generate a precision result results in excessive power consumption and results in a slower system. For non-critical data, approximate computing circuits significantly reduce the circuit complexity and hence power consumption. For non-critical data, approximate computing circuits significantly reduce the circuit complexity and hence power consumption. In this paper, a novel approximate single precision floating point adder is proposed with an approximate mantissa adder. The mantissa adder is designed with three 8-bit full adder blocks.","PeriodicalId":158991,"journal":{"name":"International Journal of Reconfigurable and Embedded Systems (IJRES)","volume":"15 3","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141704607","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A novel ensemble deep network framework for scene text recognition","authors":"Sunil Kumar Dasari, S. Mehta, D. Steffi","doi":"10.11591/ijres.v13.i2.pp403-413","DOIUrl":"https://doi.org/10.11591/ijres.v13.i2.pp403-413","url":null,"abstract":"In recent years, scene text recognition (STR) has always been considered a sequence-to-sequence problem. Attention-based techniques have a greater potential for context-semantic modelling, but they tend to overfit inadequate training data. STR is one of the most important and difficult challenges in image-based sequence recognition. A novel framework ensemble deep network (EDN) is proposed, EDN comprises customized convolutional neural network (CNN), and deep autoencoder. Customized CNN is designed by introducing the optimal spatial transformation module for optimizing the input of irregular text to read for same size. Further, deep autoencoder is introduced with effective attention mechanism utilizing the inherent features. The proposed ensemble deep network-proposed system (EDN-PS) approach outperforms the existing state-of-art techniques for both irregular and regular scene-texts and upon further simulations, the proposed model generates better results for IIIT5K, ICDAR-13, ICDAR-15, and CUTE dataset in comparison with the existing system hence our proposed EDN-PS model outperforms the existing state-of-art methods.","PeriodicalId":158991,"journal":{"name":"International Journal of Reconfigurable and Embedded Systems (IJRES)","volume":"88 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141705376","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Internet of thing based health monitoring system using wearable sensors networks","authors":"Mohsina Mirza, Valarmathi Periyasamy, Mekala Ramesh, Sathya Mariappan, Sudarmani Rajagopal, K. Suriyan, Kanagaraj Venusamy","doi":"10.11591/ijres.v13.i2.pp424-430","DOIUrl":"https://doi.org/10.11591/ijres.v13.i2.pp424-430","url":null,"abstract":"Maintaining mental and physical health is becoming increasingly important for maintaining independent living, particularly as the population of people suffering from chronic illnesses like diabetes, heart disease, obesity, and other conditions rises and the average age of many societies keeps rising. Using sensors, monitoring health remotely, and ultimately recognising daily activities have all been proposed as potential strategies. In this work, fatigue threshold and environmental bounds are assessed and provided via an external interface to a microcontroller unit (MCU) in addition to the required restrictions. Rerouting the required boundaries into the long range (LoRa) and Bluetooth module, the MCU is responsible for editing and analysing the raw data to remove the oxygen immersion, pulse, and temperature data. These important restrictions are sent to many terminals, such as PCs and mobile devices, using the remote Bluetooth and LoRa module. For data storage and retrieval, any IoT platform may be used. With caution, the patient is discharged home after the medical experts have carefully evaluated the diseases in light of the new features. To telemonitor patients with heart conditions, the test results show that the framework is efficient and dependable for collecting, sending, and presenting electrocardiogram (ECG) data constantly.","PeriodicalId":158991,"journal":{"name":"International Journal of Reconfigurable and Embedded Systems (IJRES)","volume":"27 7","pages":""},"PeriodicalIF":0.0,"publicationDate":"2024-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141710917","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}