2006 IEEE Design and Diagnostics of Electronic Circuits and systems最新文献_第3页

On the Use of Information Redundancy When Designing Secure Chips 信息冗余在安全芯片设计中的应用

2006 IEEE Design and Diagnostics of Electronic Circuits and systems Pub Date : 2006-04-18 DOI: 10.1109/DDECS.2006.1649594

R. Leveugle, V. Maingot

引用次数: 1

A Low Complexity, High Speed, Regular and Flexible Reed Solomon Decoder for Wireless Communication 一种用于无线通信的低复杂度、高速、规则和灵活的里德索罗门解码器

2006 IEEE Design and Diagnostics of Electronic Circuits and systems Pub Date : 2006-04-18 DOI: 10.1109/DDECS.2006.1649566

A. Rashid, F. Fitzek, O. Olsen, Morten Gade, Y. Moullec

引用次数: 9

Embedded Self Repair by Transistor and Gate Level Reconfiguration 晶体管和栅极级重构的嵌入式自修复

2006 IEEE Design and Diagnostics of Electronic Circuits and systems Pub Date : 2006-04-18 DOI: 10.1109/DDECS.2006.1649613

R. Kothe, H. Vierhaus, Torsten Coym, W. Vermeiren, B. Straube

引用次数: 25

Impact of Shared Instruction Memory on Performance of FPGA-based MP-SoC Video Encoder 共享指令存储器对基于fpga的MP-SoC视频编码器性能的影响

2006 IEEE Design and Diagnostics of Electronic Circuits and systems Pub Date : 2006-04-18 DOI: 10.1109/DDECS.2006.1649571

A. Kulmala, E. Salminen, O. Lehtoranta, T. Hämäläinen, Marko Hännikäinen

引用次数: 5

Dependability Computation for Fault Tolerant Reconfigurable Duplex System 容错可重构双工系统的可靠性计算

2006 IEEE Design and Diagnostics of Electronic Circuits and systems Pub Date : 2006-04-18 DOI: 10.1109/DDECS.2006.1649586

P. Kubalík, R. Dobias, H. Kubátová

引用次数: 7

Can clock faults be detected through functional test? 时钟故障是否可以通过功能测试检测出来?

2006 IEEE Design and Diagnostics of Electronic Circuits and systems Pub Date : 2006-04-18 DOI: 10.1109/DDECS.2006.1649606

C. Metra, Daniele Rossi, M. Omaña, J. M. Cazeaux, T. M. Mak

引用次数: 13

A Core Generator for Multi-ALU Processors Utilized in Genetic Parallel Programming 遗传并行规划中多alu处理器的核心生成器

2006 IEEE Design and Diagnostics of Electronic Circuits and systems Pub Date : 2006-04-18 DOI: 10.1109/DDECS.2006.1649625

Z. Gajda

引用次数: 2

Design and verification methodology for reconfigurable designs in atmel FPSLIC atmel FPSLIC可重构设计的设计与验证方法

2006 IEEE Design and Diagnostics of Electronic Circuits and systems Pub Date : 2006-04-18 DOI: 10.1109/DDECS.2006.1649577

J. Kadlec, M. Danek

引用次数: 0

Recognition of DRM signal in frequency domain and hardware demands DRM信号的频域识别及硬件要求

2006 IEEE Design and Diagnostics of Electronic Circuits and systems Pub Date : 2006-04-18 DOI: 10.1109/DDECS.2006.1649574

L. Ruckay

引用次数: 1

Concurrent testing of digital circuits for advanced fault models 高级故障模型的数字电路并行测试

2006 IEEE Design and Diagnostics of Electronic Circuits and systems Pub Date : 2006-04-18 DOI: 10.1109/DDECS.2006.1649612

S. Biswas, S. Mukhopadhyay, P. Patra, D. Sarkar

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引用次数: 2