2014 2nd International Conference on Electronic Design (ICED)最新文献

A new trimming approach for shunt resistors used in metering applications 一种用于计量应用的并联电阻器的新修整方法

2014 2nd International Conference on Electronic Design (ICED) Pub Date : 2014-08-19 DOI: 10.1109/ICED.2014.7015778

Siti Nabilah Misti, M. Birkett, David Bell, R. Penlington

引用次数: 3

LTE-Fractional Frequency Reuse (FFR) optimization with femtocell network 基于飞蜂窝网络的lte -分数频率复用优化

2014 2nd International Conference on Electronic Design (ICED) Pub Date : 2014-08-01 DOI: 10.1109/ICED.2014.7015863

Jing Huey Lim, R. Badlishah, M. Jusoh

引用次数: 13

Enhanced generalized predictive control with disturbance compensation 具有扰动补偿的增强广义预测控制

2014 2nd International Conference on Electronic Design (ICED) Pub Date : 2014-08-01 DOI: 10.1109/ICED.2014.7015848

Kwek Lee Chung, Alan Tan Wee Chiat, W. E. Kiong

{"title":"Enhanced generalized predictive control with disturbance compensation","authors":"Kwek Lee Chung, Alan Tan Wee Chiat, W. E. Kiong","doi":"10.1109/ICED.2014.7015848","DOIUrl":"https://doi.org/10.1109/ICED.2014.7015848","url":null,"abstract":"This paper presents an improved generalized predictive control (GPC) scheme integrated with a disturbance compensation scheme that combines iterative learning control (ILC) and real-time feedback control (RFC). A least mean square error (LMSE) estimator has been used to estimate the output error caused by repeatable disturbances. The use of this estimated error information in the ILC component aims to reduce the effect of real-time disturbances in the learning process. On the other hand, the inclusion of the current cycle error information, handled by the RFC component, allows the controller to make more immediate corrections with respect to disturbances occurring during the on-going operation. The proposed GPC-ILC-RFC-LMSE method is simulated on a two-link planar robotic manipulator that is to track a circular trajectory repeatedly. A discrete-time model of the robotic manipulator is used to predict the system output over a prediction horizon such that optimal control inputs that minimize the angular position and velocity trajectory errors can be determined. The proposed GPC-ILC-RFC-LMSE scheme succeeds to reduce the trajectory tracking errors significantly where the average MSE values is merely 40% of that of the GPC-ILC counterpart. In addition, the proposed controller is more robust if compared to the existing GPC learning methods where smoother control input profiles has been achieved.","PeriodicalId":143806,"journal":{"name":"2014 2nd International Conference on Electronic Design (ICED)","volume":"127 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125099119","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Performance analysis of multi-carrier code division multiple access system based on over-sampling multiwavelet transform over wireless channel 无线信道上基于过采样多小波变换的多载波码分多址系统性能分析

2014 2nd International Conference on Electronic Design (ICED) Pub Date : 2014-08-01 DOI: 10.1109/ICED.2014.7015762

Sameer A. Dawood, M. Anuar, R. A. Fayadh, F. Malek, F. Abdullah

引用次数: 1

The effect of shorting pin locations on the performance of a pattern reconfigurable Yagi-Uda patch antenna 短引脚位置对模式可重构Yagi-Uda贴片天线性能的影响

2014 2nd International Conference on Electronic Design (ICED) Pub Date : 2014-08-01 DOI: 10.1109/ICED.2014.7015864

T. Sabapathy, R. Ahmad, M. Jusoh, M. Kamarudin

引用次数: 8

An optimal cardinality of wavelength/time incoherent OCDMA system using 2-D hybrid FCC-MDW code 使用二维混合FCC-MDW码的波长/时间非相干OCDMA系统的最优基数

2014 2nd International Conference on Electronic Design (ICED) Pub Date : 2014-08-01 DOI: 10.1109/ICED.2014.7015830

N. Din Keraf, S. Aljunid, A. R. Arief, M. Anuar, C. Rashidi, P. Ehkan, M. N. Nurol

引用次数: 9

Analysis of FXP adders and multipliers for speed- and area-efficient LNS arithmetic unit 速度和面积效率高的LNS算法单元的FXP加法器和乘法器分析

2014 2nd International Conference on Electronic Design (ICED) Pub Date : 2014-08-01 DOI: 10.1109/ICED.2014.7015806

R. C. Ismail, Siti Zarina Md Naziri, S. Murad, J. N. Coleman

{"title":"Analysis of FXP adders and multipliers for speed- and area-efficient LNS arithmetic unit","authors":"R. C. Ismail, Siti Zarina Md Naziri, S. Murad, J. N. Coleman","doi":"10.1109/ICED.2014.7015806","DOIUrl":"https://doi.org/10.1109/ICED.2014.7015806","url":null,"abstract":"This paper portrays the selection of hardware unit architectures to be implemented in the new LNS based on a 32bit system. The implementations of the LNS multiply and divide only require a FXP adder, while the LNS addition and subtraction function comprised of several memories, FXP adders and multipliers together with other supporting logics. Thus, in choosing the best FXP adders and multipliers, each of the arithmetic is functionally verified and synthesised using Synopsys Design Compiler in Faraday 0.18 μm CMOS technology based on a 32-bit system. Two types of performance measurement, which are the worst-case delay and the silicon area, are chosen as the evaluation arguments. From conducted analytical studies, the CLA/CSLA adder and Booth recoded with Wallace tree multiplier were the best FXP adder and multiplier blocks to be applied in the system since they were the fastest designs. Using these blocks, the synthesis of the LNS system produced an approximately 7.10 ns of critical delay for addition and subtraction, and solely 1.16 ns for multiplication and division. The total area for a complete LNS architecture was 599,871 μm2, in which 65% the size of previously designed LNS architecture of ELM.","PeriodicalId":143806,"journal":{"name":"2014 2nd International Conference on Electronic Design (ICED)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126539122","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

An efficient processing element architecture for pairwise sequence alignment 一种有效的成对序列比对处理单元体系结构

2014 2nd International Conference on Electronic Design (ICED) Pub Date : 2014-08-01 DOI: 10.1109/ICED.2014.7015850

M. N. Isa, S. Murad, R. C. Ismail, M. I. Ahmad, A. B. Jambek, M. K. Md Kamil

引用次数: 3

Plant bio-absorber for ammonia gas absorption using I2C interface data acquisition system 植物生物吸收器氨气体吸收采用I2C接口数据采集系统

2014 2nd International Conference on Electronic Design (ICED) Pub Date : 2014-08-01 DOI: 10.1109/ICED.2014.7015856

M. M. Bakri, A. Zakaria, S. Zakaria, L. Kamarudin, A. Shakaff, F. Saad, M. Ibrahim, M. M. Razali

引用次数: 2

An implementation of caesar cipher and XOR encryption technique in a secure wireless communication 凯撒密码和异或加密技术在安全无线通信中的实现

2014 2nd International Conference on Electronic Design (ICED) Pub Date : 2014-08-01 DOI: 10.1109/ICED.2014.7015781

Lim Chong Han, N. Mahyuddin

引用次数: 10