Proceedings of the 2016 International Symposium on Low Power Electronics and Design最新文献

{"title":"SocialHBC: Social Networking and Secure Authentication using Interference-Robust Human Body Communication","authors":"Shreyas Sen","doi":"10.1145/2934583.2934609","DOIUrl":"https://doi.org/10.1145/2934583.2934609","url":null,"abstract":"With the advent of cheap computing through five decades of continued miniaturization following Moore's Law, wearable devices are becoming increasingly popular. These wearable devices are typically interconnected using wireless body area network (WBAN). Human body communication (HBC) provides an alternate energy-efficient communication technique between on-body wearable devices by using the human body as a conducting medium. This allows order of magnitude lower communication power, compared to WBAN, due to lower loss and broadband signaling. Moreover, HBC is significantly more secure than WBAN, as the information is contained within the human body and cannot be snooped on unless the person is physically touched. In this paper, we highlight applications of HBC as (1) Social Networking (e.g. LinkedIn/Facebook friend request sent during Handshaking in a meeting/party), (2) Secure Authentication using human-human or human-machine dynamic HBC and (3) ultra-low power, secure BAN using intra-human HBC. One of the biggest technical bottlenecks of HBC has been the interference (e.g. FM) picked up by the human body acting like an antenna. In this work for the first time, we introduce an integrating dual data rate (DDR) receiver technique, that allows notch filtering (>20 dB) of the interference for interference-robust HBC.","PeriodicalId":142716,"journal":{"name":"Proceedings of the 2016 International Symposium on Low Power Electronics and Design","volume":"63 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133994390","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"A Light-powered, \"Always-On\", Smart Camera with Compressed Domain Gesture Detection","authors":"A. Anvesha, Shaojie Xu, N. Cao, J. Romberg, A. Raychowdhury","doi":"10.1145/2934583.2934594","DOIUrl":"https://doi.org/10.1145/2934583.2934594","url":null,"abstract":"In this paper we propose an energy-efficient camera-based gesture recognition system powered by light energy for \"always on\" applications. Low energy consumption is achieved by directly extracting gesture features from the compressed measurements, which are the block averages and the linear combinations of the image sensor's pixel values. The gestures are recognized using a nearest-neighbour (NN) classifier followed by Dynamic Time Warping (DTW). The system has been implemented on an Analog Devices Black Fin ULP vision processor and powered by PV cells whose output is regulated by TI's DC-DC buck converter with Maximum Power Point Tracking (MPPT). Measured data reveals that with only 400 compressed measurements (768x compression ratio) per frame, the system is able to recognize key wake-up gestures with greater than 80% accuracy and only 95mJ of energy per frame. Owing to its fully self-powered operation, the proposed system can find wide applications in \"always-on\" vision systems such as in surveillance, robotics and consumer electronics with touch-less operation.","PeriodicalId":142716,"journal":{"name":"Proceedings of the 2016 International Symposium on Low Power Electronics and Design","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130457026","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

{"title":"Proceedings of the 2016 International Symposium on Low Power Electronics and Design","authors":"Yuan Xie, T. Karnik, M. Khellah, Renu Mehra","doi":"10.1145/2934583","DOIUrl":"https://doi.org/10.1145/2934583","url":null,"abstract":"It is our great pleasure to welcome you to the 2014 ACM/IEEE International Symposium on Low Power Electronics and Design -- ISLPED'14, in the beautiful city of La Jolla, CA, USA. The mission of our symposium is to provide education and technical enrichment for professionals in the area of low power electronics and design and promote advancement of the state-of-the-art in the same area. It provides a forum for technical discussions and a platform for examining new ideas and research topics. \u0000 \u0000This year, the call for papers attracted 184 submissions from Asia, Africa, Europe, and North & South America. The Technical Program Committee (TPC), consisting of 78 experts from industry and academia, accepted a total of 63 papers divided into 43 for full-length presentations and 20 for poster presentations. The accepted papers cover a variety of low-power topics in technologies, circuits, logic & architecture, CAD Tools & methodologies, systems & platforms, and software and applications. We are very thankful to the authors for contributing to ISLEPD'14. We are also grateful to our TPC members for volunteering their valuable time and effort in reviewing the papers, attending the in-person review meeting, and providing feedback to the authors. \u0000 \u0000In addition to the above accepted papers, this year's program features: \u0000Three Keynote Speeches on \"Low Power Design Techniques in Mobile Processes\" by Dr. Karim Arabi, VP Engineering, Qualcomm Technologies, Inc.; \"Accelerator-Rich Architectures --- From Single-chip to Datacenters\" by Prof. Jason Cong, Chancellor's Professor at the Computer Science Dept., UCLA, and \"The New (System) Balance of Power and Opportunities for Optimizations\" by Dr. Partha Ranganathan, Principal Engineer, Google. \u0000Industry Focus Session on the Challenges of Low Power Analog Circuits, Exploiting FD-SOI for Energy Efficient SoCs, and Using Embedded STT-MRAM for Mobile Applications. \u0000Four Embedded Invited Papers on Emerging Interconnect Technologies, Low Power Processor Design, Leakage Mitigation in Smartphone SoCs, and Powering the Internet of Things. \u0000Embedded Tutorial by industry DA experts on \"Failing to Fail - Achieving Success in Advanced Low Power Design using UPF\". \u0000 \u0000 \u0000 \u0000We hope the above talks will complement our main program by providing you with an in-depth understanding of the low-power state-of-the-art as well as gives you valuable insights into future trends. Finally, we hope that you will find the overall program interesting and thought-provoking and that the symposium will provide you with a valuable opportunity to share ideas with other researchers and practitioners from institutions around the world.","PeriodicalId":142716,"journal":{"name":"Proceedings of the 2016 International Symposium on Low Power Electronics and Design","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115235893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}