2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)最新文献

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Defect Detection in Double-Sided Cooled Power Modules by Structure Functions 基于结构功能的双面冷却电源模块缺陷检测
2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) Pub Date : 2022-06-12 DOI: 10.1109/prime55000.2022.9816814
C. Scognamillo, A. P. Catalano, V. d’Alessandro, L. Codecasa, A. Castellazzi
{"title":"Defect Detection in Double-Sided Cooled Power Modules by Structure Functions","authors":"C. Scognamillo, A. P. Catalano, V. d’Alessandro, L. Codecasa, A. Castellazzi","doi":"10.1109/prime55000.2022.9816814","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816814","url":null,"abstract":"This paper presents an approach based on structure functions aimed to the defect detection in state-of-the-art double-sided cooled power modules. The investigation is conducted by means of highly detailed 3-D finite-element method thermal simulations on the exact replica of a power module. Typical defects are emulated ad-hoc in the numerical environment: solder delamination, detached interconnections, and voids/bubbles in the thermal interface material. It is demonstrated that assigned defects give specific shapes to the structure functions; once these shapes are classified, the nature of the defects can be easily unraveled from experimental data.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115493113","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 2+1 Hybrid Incremental MASH Converter 一种2+1混合增量MASH转换器
2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) Pub Date : 2022-06-12 DOI: 10.1109/prime55000.2022.9816778
Antonio Colucci, Massimo Rigo, C. Fiocchi, P. Malcovati, E. Bonizzoni
{"title":"A 2+1 Hybrid Incremental MASH Converter","authors":"Antonio Colucci, Massimo Rigo, C. Fiocchi, P. Malcovati, E. Bonizzoni","doi":"10.1109/prime55000.2022.9816778","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816778","url":null,"abstract":"This paper explores the possibility of using the MASH (multi-stage noise shaping) technique in incremental converters to be used for x-rays detection, targeting a medium-high resolution in a limited conversion time. The presented 2+1 MASH receives at the input a current generated by a photodiode. The adopted scheme is hybrid as the input stage is continuous time while the remaining portion of the circuit operates at discrete time. The converter is studied at the behavioural level in the MATLAB-Simulink environment and some design trade-offs are analysed and discussed in details.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131228786","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Flood monitoring: a LoRa based case-study in the city of L’Aquila 洪水监测:拉奎拉市基于LoRa的案例研究
2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) Pub Date : 2022-06-12 DOI: 10.1109/prime55000.2022.9816747
Mattia Ragnoli, V. Stornelli, D. Tosto, G. Barile, A. Leoni, G. Ferri
{"title":"Flood monitoring: a LoRa based case-study in the city of L’Aquila","authors":"Mattia Ragnoli, V. Stornelli, D. Tosto, G. Barile, A. Leoni, G. Ferri","doi":"10.1109/prime55000.2022.9816747","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816747","url":null,"abstract":"Low Power Wide Area Network (LPWAN) technologies are particularly suited for environmental monitoring applications due to their potential to achieve small and inexpensive Internet of Things (IoT) systems. In this paper, a LoRa based Wireless Sensor Network (WSN) environmental and flood-oriented monitoring system is presented, covering the sensor node design, realization and real world scenario test results. The system is composed of a microcontroller based sensory device, oriented to raw analog data sampling and manipulation, through a LoRa radio interface used to communicate with a LoRaWAN network structure, followed by a remote web section for information analysis and flooding alarm. Waterproof temperature sensors are employed onboard to enhance the environmental monitoring capability. A MEMS accelerometer device allows alert activation in case of structural activity or vandalism. A power management analysis of the WSN node is provided, so to overcome this critical aspect, in LPWAN implementations. The system is oriented to a modular perspective to achieve different sensor interfacing functionalities.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124634881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Complementary High-Voltage Compliant High-Current Output Stages for PoDL 互补高压兼容大电流输出级的PoDL
2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) Pub Date : 2022-06-12 DOI: 10.1109/prime55000.2022.9816762
Felix Schwarze, F. Protze, C. Matthus, F. Ellinger
{"title":"Complementary High-Voltage Compliant High-Current Output Stages for PoDL","authors":"Felix Schwarze, F. Protze, C. Matthus, F. Ellinger","doi":"10.1109/prime55000.2022.9816762","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816762","url":null,"abstract":"This paper presents the design of two complementary high-voltage compliant high-current output stages manufactured in an 0.18 $mu$m high-voltage CMOS technology. The proposed circuits provide a high-voltage compliant monolithic interface for conventional current-steering digital-to-analog converters in the context of Power over Data Lines (PoDL) for Automotive Ethernet. The proposed output stages differ in their function as current sink or current source. Both are composed of improved active-feedback cascode current mirrors with a very large input to output current ratio of 1:50. The current source is the first reported high-voltage compliant current source featuring this topology in a two-stage design. Both circuits offer the widest reported output range for high-voltage compliant current output stages at 500 mA. With a passband gain of 34 dB, both proposed circuits do also extend the state-of-the-art in terms of the achieved gain-bandwidth product at 544 MHz and 656 MHz respectively.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124636866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Behavioural Current Limiter Optimisation 行为电流限制器优化
2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) Pub Date : 2022-06-12 DOI: 10.1109/prime55000.2022.9816791
Francesco Grattacaso, Daniel W. Mayer, P. D. Croce, A. Baschirotto
{"title":"Behavioural Current Limiter Optimisation","authors":"Francesco Grattacaso, Daniel W. Mayer, P. D. Croce, A. Baschirotto","doi":"10.1109/prime55000.2022.9816791","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816791","url":null,"abstract":"In this paper an optimisation procedure based on a Behavioural model (developed in MATLAB and Simulink) of a current limiter circuit is presented. Through the behavioural environment a coarse design optimisation is performed, while fine optimisation is later performed at transistor level. The proposed approach reduces design time compared to a full transistor level design procedure. Once the behavioural model reliably fits the transistor level behavior, any optimisation algorithm can be used in the MATLAB environment to adjust behavioural model parameters. The Current limiter case adopted as benchmark in this work demonstrates how control-loop stability can be improved through the parametric study of the loop frequency response and can be optimized by the insertion of an additional zero in the circuit transfer function.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126612054","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Phase-change memory cells characterization in an analog in-memory computing perspective 从模拟内存计算的角度看相变存储单元的特性
2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) Pub Date : 2022-06-12 DOI: 10.1109/prime55000.2022.9816788
Alessio Antolini, Andrea Lico, E. Franchi, M. Carissimi, M. Pasotti
{"title":"Phase-change memory cells characterization in an analog in-memory computing perspective","authors":"Alessio Antolini, Andrea Lico, E. Franchi, M. Carissimi, M. Pasotti","doi":"10.1109/prime55000.2022.9816788","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816788","url":null,"abstract":"Power consumption related to data transfers between processing and memory units has become a critical issue in the recent data-centric outlook of integrated circuits. In the context of In-memory Computing (IMC), where data conveyance is narrowed performing computations directly within the memory unit, Phase-change Memory (PCM) technology has become an attractive candidate due to its intrinsic multilevel storage capability. The test vehicle of this work is an embedded PCM (ePCM) provided by STMicroelectronics and designed in 90-nm smart power BCD technology with a Ge-rich Ge-Sb-Te (GST) alloy for automotive applications. In this framework, a preliminary characterization of PCM cells has been carried out, aimed at evaluating their performance as enabling devices for analog in-memory computing (AIMC) applications.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114199774","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A Novel Mixed-Signal Silicon Photomultiplier with Analog-Domain Cross-Correlation Computation for LiDAR Applications 一种用于激光雷达的新型混合信号硅光电倍增管,具有模拟域互相关计算
2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) Pub Date : 2022-06-12 DOI: 10.1109/prime55000.2022.9816794
Arianna Morciano, M. Gandola, S. D'Amico, M. Perenzoni
{"title":"A Novel Mixed-Signal Silicon Photomultiplier with Analog-Domain Cross-Correlation Computation for LiDAR Applications","authors":"Arianna Morciano, M. Gandola, S. D'Amico, M. Perenzoni","doi":"10.1109/prime55000.2022.9816794","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816794","url":null,"abstract":"Light Detection and Ranging (LiDAR) is a widespread technique for distance measurements used in several applications. In this work, a novel Mixed-Signal Silicon Photomultiplier (msSiPM) with analog-domain cross-correlation computation for LiDAR applications is presented. Cross-correlation technique is commonly implemented at the end of the LiDAR system signal chain to estimate the Time-of-Flight (ToF) and to calculate the measured distance. In this work, an innovative way of performing an approximated cross-correlation inside the detector frontend is presented and simulated. In particular, the typical impulse response of an analog-SiPM (aSiPM) with a specific dead-time is replaced by a custom impulse response by means of a microcell-level Pulse Shaper stage. In this way, it is possible to tune the pulse to approximate the time-reversed shape of the laser envelope and to perform an analog cross-correlation. Simulations have been carried out in MATLAB software: by using an msSiPM instead of an aSiPM, an advantage in terms of Signal-to-Noise Ratio (SNR) of 6 dB and of Signal-to-Background Ratio (SBR) of about 23 dB is obtained.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"87 21","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120818736","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Compact Embedded System for Time-Based Electrochemical Impedance Spectroscopy of Gas Sensors 基于时间的气体传感器电化学阻抗谱的紧凑嵌入式系统
2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) Pub Date : 2022-06-12 DOI: 10.1109/prime55000.2022.9816748
A. V. Radogna, S. Capone, L. Francioso, P. Siciliano, S. D'Amico
{"title":"A Compact Embedded System for Time-Based Electrochemical Impedance Spectroscopy of Gas Sensors","authors":"A. V. Radogna, S. Capone, L. Francioso, P. Siciliano, S. D'Amico","doi":"10.1109/prime55000.2022.9816748","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816748","url":null,"abstract":"In this work, a compact embedded system for time-based EIS of gas sensors is presented. Differently from other works, which rely mostly on laboratory instrumentation, the proposed system proves that fast EIS measurements can be implemented on reduced size hardware with minimal employment of on-board components. These goals are achieved thanks to the implementation of the MLS-based measurement technique on a programmable system-on-chip (PSoC) device. In particular, the IR of the sensor is measured by driving it with an MLS excitation signal, thus performing the digital cross-correlation between the input and the output. The selected PSoC device allows the implementation of the digital circuits, the microcontroller and the analog front-end in the same device. As a benefit, the bill of onboard components is extremely reduced. The system architecture and operation are presented in detail and the experimental measurements, obtained by testing a parallel RC as sensor circuit model, are shown. The accuracy between different measurements is evaluated by computing the Pearson’s correlation coefficient for each measured IR.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115130496","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Immunity of ENOP-based Fractional-N Frequency Synthesizer to Wandering and Horn Spurs 基于enop的分数n频率合成器对流浪和角杂散的抗扰性
2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) Pub Date : 2022-06-12 DOI: 10.1109/prime55000.2022.9816753
Valerio Mazzaro, Michael Peter Kennedy
{"title":"Immunity of ENOP-based Fractional-N Frequency Synthesizer to Wandering and Horn Spurs","authors":"Valerio Mazzaro, Michael Peter Kennedy","doi":"10.1109/prime55000.2022.9816753","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816753","url":null,"abstract":"The divider controllers in fractional-N frequency synthesizers are typically digital $triangleSigma$ modulators (DDSMs). The DDSM can contribute significantly to the phase noise and spur pattern in the output of a nonlinear synthesizer. A type of time-varying spurs and another type of fixed sub-fractional frequency spurs, denoted wandering spurs and horn spurs, respectively, have been observed in simulations and measurements of fractional-N frequency synthesizers with a MASH-based divider controller. Different families of DDSMs have been presented in the past which represent an alternative to MASHDDSMs. Among these, the ENOP DDSMs are worthy of notice because of their performance in terms of nonlinearity-induced noise and spurs. In this work we show that ENOP-based divider controllers offer strong mitigation of both wandering and horn spurs.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123702602","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Low-Resource Digital Implementation of the Fitzhugh-Nagumo Neuron Fitzhugh-Nagumo神经元的低资源数字化实现
2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) Pub Date : 2022-06-12 DOI: 10.1109/prime55000.2022.9816797
A. J. Leigh, Moslem Heidarpur, M. Mirhassani
{"title":"A Low-Resource Digital Implementation of the Fitzhugh-Nagumo Neuron","authors":"A. J. Leigh, Moslem Heidarpur, M. Mirhassani","doi":"10.1109/prime55000.2022.9816797","DOIUrl":"https://doi.org/10.1109/prime55000.2022.9816797","url":null,"abstract":"Simulation is a particularly significant component of discovery and hypothesis evaluation in neuroscience. Given the typical complexity of the mathematical models involved in neuromorphic modelling, neuromorphic hardware for acceleration is an interesting topic of research. Thus, a novel, high-accuracy digital implementation of the Fitzhugh-Nagumo neuron is realized on FPGA. The proposed system offers substantial hardware resource savings and a higher clock frequency compared to previously proposed implementations. For these reasons, it is an excellent candidate for use in hardware acceleration of neuroscientific simulation. The implemented hardware achieves a normalized RMSE of 0.2451 at a maximum operation frequency of 367.78MHz.","PeriodicalId":142196,"journal":{"name":"2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121656484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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