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[Proceedings] 1992 IEEE International Symposium on Circuits and Systems最新文献

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Parallel recursive least squares algorithms for adaptive Volterra filters 自适应Volterra滤波器的并行递归最小二乘算法
[Proceedings] 1992 IEEE International Symposium on Circuits and Systems Pub Date : 1992-05-10 DOI: 10.1109/ISCAS.1992.230280
A.K. Chaturvedi, G. Sharma
{"title":"Parallel recursive least squares algorithms for adaptive Volterra filters","authors":"A.K. Chaturvedi, G. Sharma","doi":"10.1109/ISCAS.1992.230280","DOIUrl":"https://doi.org/10.1109/ISCAS.1992.230280","url":null,"abstract":"The authors present a parallel but approximate version of the exact recursive least squares algorithm. This algorithm, called the parallel recursive least squares (PRLS) algorithm, has been applied to adaptive Volterra filters. It has advantages of reduced cost per iteration and substantial reduction in computational time per iteration if more than one processor is used. The algorithm has the potential of providing a flexible tradeoff in terms of rate of convergence and computational cost.<<ETX>>","PeriodicalId":139557,"journal":{"name":"[Proceedings] 1992 IEEE International Symposium on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114971418","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Reduced complexity programmable FIR filters 降低复杂性可编程FIR滤波器
[Proceedings] 1992 IEEE International Symposium on Circuits and Systems Pub Date : 1992-05-10 DOI: 10.1109/ISCAS.1992.230130
S. Powell, P. Chau
{"title":"Reduced complexity programmable FIR filters","authors":"S. Powell, P. Chau","doi":"10.1109/ISCAS.1992.230130","DOIUrl":"https://doi.org/10.1109/ISCAS.1992.230130","url":null,"abstract":"Reduced complexity FIR (finite impulse response) filtering approaches are investigated for suitability as high-speed, general-purpose, programmable order, programmable coefficient digital filters. Approaches are investigated in terms of control complexity, speed, and hardware efficiency. Basic processing element configurations are proposed, and general implementation considerations are discussed.<<ETX>>","PeriodicalId":139557,"journal":{"name":"[Proceedings] 1992 IEEE International Symposium on Circuits and Systems","volume":"126 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115620278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Fast adaptive IIR parallel realization 快速自适应IIR并行实现
[Proceedings] 1992 IEEE International Symposium on Circuits and Systems Pub Date : 1992-05-10 DOI: 10.1109/ISCAS.1992.230554
P. Diniz, J. Cousseau, A. Antoniou
{"title":"Fast adaptive IIR parallel realization","authors":"P. Diniz, J. Cousseau, A. Antoniou","doi":"10.1109/ISCAS.1992.230554","DOIUrl":"https://doi.org/10.1109/ISCAS.1992.230554","url":null,"abstract":"A parallel realization based on the voltage-conversion generalized-immittance converter is used in the implementation of adaptive filters. In this approach the gradient vectors of the various sections are different even if the poles of the sections are located at the same position. This tends to reduce the number of iterations needed by the algorithm to escape from boundary regions. In a sense the function of the prefilter is performed by the parallel sections themselves without using a prefilter. In addition, the use of a variable convergence factor in the Gauss-Newton algorithm is investigated. Extensive experimental results show that the proposed realization leads to efficient adaptive filters with fast convergence and that a variable convergence factor can increase the rate of convergence.<<ETX>>","PeriodicalId":139557,"journal":{"name":"[Proceedings] 1992 IEEE International Symposium on Circuits and Systems","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115725183","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Numerical optimization-based synthesis of pipelined A/D converters 基于数值优化的流水线A/D转换器合成
[Proceedings] 1992 IEEE International Symposium on Circuits and Systems Pub Date : 1992-05-10 DOI: 10.1109/ISCAS.1992.230566
L. R. Carley, P. Fung, P. Donehue, A. Biyabani
{"title":"Numerical optimization-based synthesis of pipelined A/D converters","authors":"L. R. Carley, P. Fung, P. Donehue, A. Biyabani","doi":"10.1109/ISCAS.1992.230566","DOIUrl":"https://doi.org/10.1109/ISCAS.1992.230566","url":null,"abstract":"A pipelined analog-to-digital (AD) converter synthesis tool that uses hierarchical decomposition and numerical optimization is presented. The macro-models used to characterize this class of pipelined A/D converters make use of simplified analytical equations that predict overall A/D performance in terms of the performance of the principal blocks, operational amplifiers and comparators. The system-level A/D designer uses a combination of analytical equations and heuristics to translate the AD performance specifications into a set of specifications for the stage designers. Continuing the synthesis hierarchically, the block designers make use of different sets of simplified analytical equations to predict block performance in terms of small signal device parameters. The block designers use constrained numerical optimization techniques to synthesize circuits which satisfy functional and performance constraints. Simulation results verify the synthesis tool's success in designing high-speed pipelined A/D converters in a 2- mu m CMOS process.<<ETX>>","PeriodicalId":139557,"journal":{"name":"[Proceedings] 1992 IEEE International Symposium on Circuits and Systems","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114651300","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Recent results in robust parametric stability and control 鲁棒参数稳定性与控制的最新研究成果
[Proceedings] 1992 IEEE International Symposium on Circuits and Systems Pub Date : 1992-05-10 DOI: 10.1109/ISCAS.1992.230661
S. P. Bhattacharyya
{"title":"Recent results in robust parametric stability and control","authors":"S. P. Bhattacharyya","doi":"10.1109/ISCAS.1992.230661","DOIUrl":"https://doi.org/10.1109/ISCAS.1992.230661","url":null,"abstract":"The author describes some recent results obtained on the robust stability and control of systems containing parametric uncertainty. He begins with Kharitonov's theorem on interval systems and its generalization to control systems containing linearly correlated interval parametric uncertainty, obtained by H. Chapellat and S.P. Bhattacharyya in 1989. The relationship of this result, called the linear CB theorem and of its generalization to the multilinear case, to extremal stability subsets and other connections constitutes an extensive and coherent theory of robust parametric stability. This theory is summarized.<<ETX>>","PeriodicalId":139557,"journal":{"name":"[Proceedings] 1992 IEEE International Symposium on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117133011","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Architectures for analog VLSI implementation of neural networks for solving linear equations with inequality constraints 用于求解具有不等式约束的线性方程的神经网络的模拟VLSI实现架构
[Proceedings] 1992 IEEE International Symposium on Circuits and Systems Pub Date : 1992-05-10 DOI: 10.1109/ISCAS.1992.230208
A. Cichocki, J. Ramírez-Angulo, R. Unbehauen
{"title":"Architectures for analog VLSI implementation of neural networks for solving linear equations with inequality constraints","authors":"A. Cichocki, J. Ramírez-Angulo, R. Unbehauen","doi":"10.1109/ISCAS.1992.230208","DOIUrl":"https://doi.org/10.1109/ISCAS.1992.230208","url":null,"abstract":"A novel algorithm for solving generalized systems of linear equations subject to linear inequalities is proposed. The algorithm is robust with respect to wild (spiky) noise and outliers. The algorithm is expressed completely in differential equations. An OTA (operational transconductance amplifier)-based implementation of the algorithm as an analog VLSI circuit in CMOS technology is discussed. One of the many possible applications of the proposed techniques is the implementation of cellular neural networks with real-time on-chip learning capabilities.<<ETX>>","PeriodicalId":139557,"journal":{"name":"[Proceedings] 1992 IEEE International Symposium on Circuits and Systems","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117254191","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
Design of centrally symmetric 2-D FIR fan filters using the McClellan transform 利用麦克莱伦变换设计中心对称的二维FIR风扇滤波器
[Proceedings] 1992 IEEE International Symposium on Circuits and Systems Pub Date : 1992-05-10 DOI: 10.1109/ISCAS.1992.230234
W. Zhu, Z.Y. He, M. Ahmad, M. Swamy
{"title":"Design of centrally symmetric 2-D FIR fan filters using the McClellan transform","authors":"W. Zhu, Z.Y. He, M. Ahmad, M. Swamy","doi":"10.1109/ISCAS.1992.230234","DOIUrl":"https://doi.org/10.1109/ISCAS.1992.230234","url":null,"abstract":"The authors present a novel design method for 2-D zero-phase finite impulse response (FIR) fan filters with centrally symmetric frequency responses, via the generalized McClellan transform. The formulas are derived from the prescribed frequency response specifications of the fan filter and are optimal in the mean square sense. The efficiency of the method is shown through design examples.<<ETX>>","PeriodicalId":139557,"journal":{"name":"[Proceedings] 1992 IEEE International Symposium on Circuits and Systems","volume":"190 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120850279","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Stability and scaling of double loop Sigma Delta modulators 双环σ δ调制器的稳定性和标度
[Proceedings] 1992 IEEE International Symposium on Circuits and Systems Pub Date : 1992-05-10 DOI: 10.1109/ISCAS.1992.230263
S. Hein, A. Zakhor
{"title":"Stability and scaling of double loop Sigma Delta modulators","authors":"S. Hein, A. Zakhor","doi":"10.1109/ISCAS.1992.230263","DOIUrl":"https://doi.org/10.1109/ISCAS.1992.230263","url":null,"abstract":"The application of the double loop Sigma Delta modulator to analog-to-digital conversion is considered. To avoid integrator saturation in implementations, it is necessary to know the maximum occurring integrator output voltages. The authors address this problem by deriving upper bounds on the steady-state values of integrator outputs for the general double loop modulator with constant inputs. They use the upper bounds to derive scaling factors that are optimized with respect to stability as well as an approximate performance measure. Simulations show that the results which are proven for constant inputs can be useful in the design of modulators with dynamic inputs, and that gains of about 2 dB in both dynamic range and peak signal-to-noise ratio can be achieved for time-varying inputs.<<ETX>>","PeriodicalId":139557,"journal":{"name":"[Proceedings] 1992 IEEE International Symposium on Circuits and Systems","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121121861","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Optimal and near-optimal techniques for multiprocessor scheduling of multiple-rate algorithms on synchronous multiprocessor systems 同步多处理机系统中多速率算法的最优和近最优调度技术
[Proceedings] 1992 IEEE International Symposium on Circuits and Systems Pub Date : 1992-05-10 DOI: 10.1109/ISCAS.1992.230493
P. Gelabert, T. Barnwell
{"title":"Optimal and near-optimal techniques for multiprocessor scheduling of multiple-rate algorithms on synchronous multiprocessor systems","authors":"P. Gelabert, T. Barnwell","doi":"10.1109/ISCAS.1992.230493","DOIUrl":"https://doi.org/10.1109/ISCAS.1992.230493","url":null,"abstract":"The authors describe two multiprocessor compiler techniques that generate synchronous multiprocessor schedules for multiple-rate algorithms represented by fully specified flow graphs (FSFGs) which contain up-samplers and down-samplers. The first scheduling technique is based on a modified multi-cyclic multiprocessor compiler that finds globally optimal solutions. The second technique generates near-optimal solutions by trading global optimality for a lower scheduling complexity. These scheduling techniques are illustrated with examples.<<ETX>>","PeriodicalId":139557,"journal":{"name":"[Proceedings] 1992 IEEE International Symposium on Circuits and Systems","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121360471","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Fully differential switched-current building blocks 全差动开关电流模块
[Proceedings] 1992 IEEE International Symposium on Circuits and Systems Pub Date : 1992-05-10 DOI: 10.1109/ISCAS.1992.230241
U. Gatti, F. Maloberti
{"title":"Fully differential switched-current building blocks","authors":"U. Gatti, F. Maloberti","doi":"10.1109/ISCAS.1992.230241","DOIUrl":"https://doi.org/10.1109/ISCAS.1992.230241","url":null,"abstract":"Fully differential solutions for switched-current filters are described. The proposed circuits, besides reducing the clock feedthrough effect, improve the linearity of equivalent single-ended solutions and offer additional degrees of freedom. Some basic building blocks required in switched-current filters (like integrators and derivators) are realized in the fully differential approach.<<ETX>>","PeriodicalId":139557,"journal":{"name":"[Proceedings] 1992 IEEE International Symposium on Circuits and Systems","volume":"105 12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1992-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127436429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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