Numerical optimization-based synthesis of pipelined A/D converters

Abstract

A pipelined analog-to-digital (AD) converter synthesis tool that uses hierarchical decomposition and numerical optimization is presented. The macro-models used to characterize this class of pipelined A/D converters make use of simplified analytical equations that predict overall A/D performance in terms of the performance of the principal blocks, operational amplifiers and comparators. The system-level A/D designer uses a combination of analytical equations and heuristics to translate the AD performance specifications into a set of specifications for the stage designers. Continuing the synthesis hierarchically, the block designers make use of different sets of simplified analytical equations to predict block performance in terms of small signal device parameters. The block designers use constrained numerical optimization techniques to synthesize circuits which satisfy functional and performance constraints. Simulation results verify the synthesis tool's success in designing high-speed pipelined A/D converters in a 2- mu m CMOS process.<>