2016 11th International Design & Test Symposium (IDT)最新文献_第3页

NVMe Solid State Drive verification solution using HW Emulation and Virtual Device Technologies 使用硬件仿真和虚拟设备技术的NVMe固态硬盘验证解决方案

2016 11th International Design & Test Symposium (IDT) Pub Date : 2016-12-01 DOI: 10.1109/IDT.2016.7843013

Mohamed Abdelsalam

引用次数: 4

A narrative of UVM testbench environment for interconnection routers: A practical approach 互连路由器的UVM测试台环境的叙述:一个实用的方法

2016 11th International Design & Test Symposium (IDT) Pub Date : 2016-12-01 DOI: 10.1109/IDT.2016.7843022

Ahmed El-Naggar, Essraa Massoud, A. Medhat, Hala Ibrahim, Bassma Al-Abassy, Sameh El-Ashry, Mostafa Khamis, A. Shalaby

引用次数: 5

Fault-Tolerant in Embedded Systems (MPSoC): Performance estimation and dynamic migration tasks 嵌入式系统(MPSoC)中的容错:性能评估和动态迁移任务

2016 11th International Design & Test Symposium (IDT) Pub Date : 2016-12-01 DOI: 10.1109/IDT.2016.7843005

K. Smiri, Safa Bekri, Habib Smei

引用次数: 9

Pipelining the HEVC decoder on ZedBoard plateform 在ZedBoard平台上流水线化HEVC解码器

2016 11th International Design & Test Symposium (IDT) Pub Date : 2016-12-01 DOI: 10.1109/IDT.2016.7843006

Habib Smei, K. Smiri, A. Jemai

引用次数: 2

Stress-aware analog layout devices pattern generation 应力感知模拟布局器件模式生成

2016 11th International Design & Test Symposium (IDT) Pub Date : 2016-12-01 DOI: 10.1109/IDT.2016.7843046

Khaled El-Kenawy, M. Dessouky

引用次数: 5

Taking into account indirect jumps or calls in continuous control-flow checking 在连续控制流检查中考虑间接跳转或调用

2016 11th International Design & Test Symposium (IDT) Pub Date : 2016-12-01 DOI: 10.1109/IDT.2016.7843027

Lydie Terras, Y. Teglia, M. Agoyan, R. Leveugle

引用次数: 0

Real-time hardware/software co-design of a traffic sign recognition system using Zynq FPGA 基于Zynq FPGA的交通标志识别系统的实时软硬件协同设计

2016 11th International Design & Test Symposium (IDT) Pub Date : 2016-12-01 DOI: 10.1109/IDT.2016.7843059

Wajdi Farhat, H. Faiedh, C. Souani, K. Besbes

引用次数: 3

Area efficient implementation of ripple carry adder using memristor crossbar arrays 用忆阻交叉栅阵列实现纹波进位加法器的面积效率

2016 11th International Design & Test Symposium (IDT) Pub Date : 2016-12-01 DOI: 10.1109/IDT.2016.7843030

P. L. Thangkhiew, Rahul Gharpinde, Varun Chowdhary Paturi, K. Datta, I. Sengupta

引用次数: 30

UML-based reconfigurable middleware for design-level timing verification in model-based approach 基于uml的可重构中间件，用于基于模型的方法中的设计级时间验证

2016 11th International Design & Test Symposium (IDT) Pub Date : 2016-12-01 DOI: 10.1109/IDT.2016.7843037

Rania Mzid, M. Abid

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引用次数: 1

Design guidelines for soft implementations to embedded NoCs of FPGAs fpga嵌入式noc的软实现设计指南

2016 11th International Design & Test Symposium (IDT) Pub Date : 2016-12-01 DOI: 10.1109/IDT.2016.7843011

N. Gamal, H. Fahmy, Y. Ismail, Tawfik Ismail, M. M. El-Din, H. Mostafa

引用次数: 5