IEEE Transactions on Emerging Topics in Computing最新文献_第9页

MaxiMoff: Designing Matrix Multiplication Accelerator for Effective Multiply-Add Operations Offloading maxmoff：设计矩阵乘法加速器，实现有效的乘加操作卸载

IF 4.8 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2026-01-01 Epub Date: 2025-11-04 DOI: 10.1109/TETC.2025.3626723

Sungwoo Kim;Dongho Ha;Seunghwan Sung;Won Woo Ro

引用次数: 0

A New Scan Based Attack on AES With Plaintext Restriction Countermeasure 一种新的基于扫描的AES攻击及明文限制对策

IF 4.8 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2026-01-01 Epub Date: 2026-01-28 DOI: 10.1109/TETC.2026.3655322

Gaurav Kumar;Anjum Riaz;Yamuna Prasad;Satyadev Ahlawat

{"title":"A New Scan Based Attack on AES With Plaintext Restriction Countermeasure","authors":"Gaurav Kumar;Anjum Riaz;Yamuna Prasad;Satyadev Ahlawat","doi":"10.1109/TETC.2026.3655322","DOIUrl":"https://doi.org/10.1109/TETC.2026.3655322","url":null,"abstract":"The scan Design-for-Testability (DfT) architecture, widely embraced in VLSI design to enhance testability and ensure reliability, inadvertently introduces security vulnerabilities. These vulnerabilities could be exploited by attackers to gain unauthorized access to sensitive or confidential data stored within cryptographic chips. Several countermeasures have been proposed to secure crypto chips against scan-based side-channel attacks. Among these, the Plaintext Restriction (PTR) technique emerges as a notably effective countermeasure for its simplicity and effectiveness in thwarting conventional scan attacks. This study conducts a comprehensive vulnerability assessment of the PTR countermeasure. It is observed that while the PTR countermeasure effectively thwarts conventional scan attacks, leakage issues still persist. To exploit this leakage, a more sophisticated scan attack is proposed, allowing the AES encryption key to be retrieved successfully. The proposed attack specifically targets the AES round key, diverging from the conventional scan attacks that primarily focus on the AES encryption key. Subsequently, this paper presents a new countermeasure aimed at addressing this vulnerability. The proposed countermeasure is able to withstand all the conventional and proposed scan attacks without impacting the testability of the design. Moreover, the proposed countermeasure incurs only a minimal area overhead of 0.76% compared to the existing countermeasures.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 1","pages":"210-221"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148511685","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Variation Resilient Schemes and Approximation-Free Offset Compensation for Reliable ReRAM-Based DNN Accelerators 可靠的基于reram的DNN加速器的变化弹性方案和无近似偏移补偿

IF 4.8 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2026-01-01 Epub Date: 2026-02-09 DOI: 10.1109/TETC.2026.3658512

Je-Woo Jang;Junyong Oh;Sung-Hyuk Cho;Jae-Youn Hong;Muhammad Imran;Jaeyong Chung;Joon-Sung Yang

{"title":"Variation Resilient Schemes and Approximation-Free Offset Compensation for Reliable ReRAM-Based DNN Accelerators","authors":"Je-Woo Jang;Junyong Oh;Sung-Hyuk Cho;Jae-Youn Hong;Muhammad Imran;Jaeyong Chung;Joon-Sung Yang","doi":"10.1109/TETC.2026.3658512","DOIUrl":"https://doi.org/10.1109/TETC.2026.3658512","url":null,"abstract":"Deep Neural Networks (DNNs) have achieved outstanding performance in various fields. However, as DNNs continue to grow in size, their performance is hindered by the memory wall problem, where data memory bandwidth becomes a bottleneck. Resistive Random Access Memory (ReRAM)-based DNN accelerators offer promising solutions to this challenge, enhancing data processing efficiency. However, these architectures face reliability issues due to cell immaturity, notably device conductance variation and offset currents in High Resistance State (HRS) cells, which compromise DNN accuracy and processing performance. This paper addresses the reliability issues of the ReRAM-based computing-in-memory (CIM) accelerator. In particular, this paper introduces a novel design methodology of shared-exponent deployment on the accelerator, enhancing variation tolerance through fine-grained quantization. In addition, this paper proposes a variation-resilient data encoding to further improve the robustness in combination with the proposed design and introduces a programming scheme for the offset current compensation. Experimental results conducted on various DNN models and datasets reveal that the proposed techniques outperform existing methods in variation tolerance and significantly improves performance and energy efficiency compared to the conventional baseline, even under high variation environments.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 1","pages":"272-285"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148506164","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Leveraging Simultaneous Usage of Edge GPU Hardware Engines for Video Face Detection and Recognition 利用边缘GPU硬件引擎同时用于视频人脸检测和识别

IF 4.8 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2026-01-01 Epub Date: 2025-12-25 DOI: 10.1109/TETC.2025.3644672

Asma Baobaid;Mahmoud Meribout

{"title":"Leveraging Simultaneous Usage of Edge GPU Hardware Engines for Video Face Detection and Recognition","authors":"Asma Baobaid;Mahmoud Meribout","doi":"10.1109/TETC.2025.3644672","DOIUrl":"https://doi.org/10.1109/TETC.2025.3644672","url":null,"abstract":"Video face detection and recognition in public places at the edge is required in several applications, such as security reinforcement and contactless access to authorized venues. This article aims to maximize the simultaneous usage of hardware engines available in edge GPUs nowadays by leveraging the concurrency and pipelining of tasks required for face detection and recognition. This also includes the video decoding task, which is required in most face monitoring applications as the video streams are usually carried via Gbps Ethernet network. This constitutes an improvement over previous works where the tasks are usually allocated to a single engine due to the lack of a unified and automated framework that simultaneously explores all hardware engines. In addition, previously, the input faces were usually embedded in still images or within raw video streams that overlook the burst delay caused by the decoding stage. The results on real-life video streams suggest that simultaneously using all the hardware engines available in the recent NVIDIA edge Orin GPU, higher throughput, and a slight saving of GPU engine power consumption of around 300 mW, accounting for around 5%, have been achieved while satisfying the real-time performance constraint. The performance gets even higher by considering several video streams simultaneously. Further performance improvement could have been obtained if the number of shuffle layers that were created by the TensorRT framework for the face recognition task was lower. Thus, the paper suggests some hardware improvements to the existing edge GPU processors to enhance their performance even higher.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 1","pages":"134-145"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11316238","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148506343","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Exploring Time Predictability for High-Bandwidth Memory Technology 探索高带宽存储器技术的时间可预测性

IF 4.8 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2026-01-01 Epub Date: 2025-12-24 DOI: 10.1109/TETC.2025.3645133

Alessandro Cilardo;Manuel Maddaluno

{"title":"Exploring Time Predictability for High-Bandwidth Memory Technology","authors":"Alessandro Cilardo;Manuel Maddaluno","doi":"10.1109/TETC.2025.3645133","DOIUrl":"https://doi.org/10.1109/TETC.2025.3645133","url":null,"abstract":"High Bandwidth Memory (HBM) is a 3D-stacked DRAM interface standard that provides higher bandwidth, lower power consumption, and a smaller footprint than DDR4 and GDDR5. It is increasingly adopted in supercomputers, datacenters, and high-end embedded platforms, such as autonomous driving systems, where it meets the performance demands of artificial intelligence and other data-intensive workloads. Beyond raw performance, many of these applications require deterministic or bounded response times, either for hard real-time safety-critical systems or to provide Quality-of-Service (QoS) guarantees in multi-tenant HPC, datacenter, and cloud environments. While performance predictability has been extensively studied for DDR memory controllers, it remains largely unexplored for HBM. Although HBM shares some characteristics with DDR, such as command reordering to reduce data bus reversals, it introduces additional challenges, including stricter timing constraints that increase command latency within bank groups. In this work, we propose an implementable architectural model of a deterministic HBM controller that addresses these challenges, together with a quantitative closed-form analysis to fully characterize its response times. We present a complete physical implementation derived from the model and describe practical simulation and synthesis toolflows enabling extensive experimental evaluation with real-world memory-intensive workloads, also including aspects such as the impact of address-to-bank/row/column mapping on HBM command performance. The proposed controller achieves a peak throughput of 13.5 GB/s per pseudo-channel and an aggregate peak throughput of 432 GB/s while providing time predictability guarantees.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 1","pages":"105-117"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11314845","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148506337","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

MemAscend: System Memory Optimization for SSD-Offloaded LLM Fine-Tuning MemAscend：用于ssd卸载LLM微调的系统内存优化

IF 4.8 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2026-01-01 Epub Date: 2026-02-10 DOI: 10.1109/TETC.2026.3661468

Yong-Cheng Liaw;Shuo-Han Chen

{"title":"MemAscend: System Memory Optimization for SSD-Offloaded LLM Fine-Tuning","authors":"Yong-Cheng Liaw;Shuo-Han Chen","doi":"10.1109/TETC.2026.3661468","DOIUrl":"https://doi.org/10.1109/TETC.2026.3661468","url":null,"abstract":"Owing to the huge success of generative artificial intelligence (AI), large language models (LLMs) have emerged as a core subclass, powering applications such as question answering, text generation, and code completion. While fine-tuning these models on domain-specific data can yield significant performance gains, it also poses daunting computational challenges, especially for researchers and organizations with limited hardware resources. Although SSD offloading (i.e., ZeRO-Infinity) has emerged as a viable strategy to overcome the GPU memory barrier via leveraging both system memory (i.e., CPU DRAM) and storage space (i.e., solid-state devices, SSDs), its design primarily targets model-centric performance issues. As a result, key system-level issues, including system memory fragmentation, inefficient pinned buffer allocation, peak system memory usage spikes, and file system overhead, remain unaddressed, limiting scalability and inflating costs. Such an observation motivates this article to introduce MemAscend, a framework that systematically tackles the underexplored system memory bottlenecks in SSD-offloaded LLM training, with a focus on resource-constrained environments. By streamlining pinned-memory allocation, eradicating fragmentation, and mitigating peak system memory usage, MemAscend reclaims a substantial system memory budget, enabling larger models, longer context windows, and higher batch sizes without exceeding modest hardware limits. Across diverse LLM benchmarks, MemAscend reduces peak system-memory consumption by an average of 55.7% compared with state-of-the-art SSD offloading techniques, lowering the hardware barrier for fine-tuning and unlocking new possibilities for cost-effective large-scale training on limited-resource machines.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 1","pages":"286-302"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148506803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Spatial-Temporal Neighborhood Transformer for Point Cloud Completion 点云补全的时空邻域变压器

IF 4.8 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2026-01-01 Epub Date: 2026-01-19 DOI: 10.1109/TETC.2026.3653889

Li An;Pengbo Zhou;Mingquan Zhou;Yong Wang;Guohua Geng;Wuyang Shui

{"title":"Spatial-Temporal Neighborhood Transformer for Point Cloud Completion","authors":"Li An;Pengbo Zhou;Mingquan Zhou;Yong Wang;Guohua Geng;Wuyang Shui","doi":"10.1109/TETC.2026.3653889","DOIUrl":"https://doi.org/10.1109/TETC.2026.3653889","url":null,"abstract":"Point cloud completion is an important task in computer vision and 3D shape analysis, widely used in areas such as autonomous driving, augmented reality, and robot navigation. However, the generalization of existing algorithms across different datasets still needs improvement. We propose a Spatial-Temporal Neighborhood Transformer model to enhance the performance andgeneralization of point cloud completion. We introduce a composite position encoding mechanism that combines local position encoding, local spatial angle encoding, and local feature information, enabling each point to fully express different angular relationships and capture the geometric information of the point cloud. This enhances the model’s ability to perceive the local structure and angular relationships of point clouds. In the encoding stage, we combine the composite position encoding with a dual-branch Mamba-Neighborhood Transformer module to achieve joint learning of local-local and local-global features, thereby better capturing the internal geometric features of the point cloud. In the decoding stage, we designed a Spatial-Temporal Neighborhood Transformer module. This module alternately uses the dual-branch Mamba-Neighborhood Transformer and the Neighborhood Cross Transformer to achieve local-global and global-global information interaction between points on the basis of local learning, enabling the model to more comprehensively understand and complete the structure of point clouds. We extensively validate the proposed method on datasets such as PCN, ShapeNet-55/34, MVP and KITTI. Experimental results show that the proposed algorithm exhibits excellent performance across various datasets, demonstrating its good generalization and strong point cloud completion capabilities.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 1","pages":"172-183"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148507098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

IEEE Transactions on Emerging Topics in Computing Publication Information IEEE计算出版信息新兴主题汇刊

IF 4.8 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2026-01-01 Epub Date: 2026-03-12 DOI: 10.1109/TETC.2026.3665088

引用次数: 0

A Representation Learning Approach to Feature Drift Detection in Wireless Networks 无线网络中特征漂移检测的表征学习方法

IF 4.8 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2026-01-01 Epub Date: 2025-12-22 DOI: 10.1109/TETC.2025.3644604

Athanasios Tziouvaras;Blaž Bertalanič;George Floros;Kostas Kolomvatsos;Panagiotis Sarigiannidis;Carolina Fortuna

{"title":"A Representation Learning Approach to Feature Drift Detection in Wireless Networks","authors":"Athanasios Tziouvaras;Blaž Bertalanič;George Floros;Kostas Kolomvatsos;Panagiotis Sarigiannidis;Carolina Fortuna","doi":"10.1109/TETC.2025.3644604","DOIUrl":"https://doi.org/10.1109/TETC.2025.3644604","url":null,"abstract":"Artificial Intelligence (AI) is foreseen to be a centerpiece in next generation wireless networks enabling ubiquitous communication as well as new services. However, in real deployment, feature distribution changes may degrade the performance of Artificial Intelligence (AI) models and lead to undesired behaviors. To counter for undetected model degradation, we propose ALERT; a method that can detect feature distribution changes and trigger model re-training that works well on two wireless network use cases: wireless fingerprinting and link anomaly detection. ALERT includes three components: representation learning, statistical testing and utility assessment. We rely on Multi-layer Perceptron (MLP) for designing the representation learning component, on Kolmogorov–Smirnov (KS) and Population Stability Index (PSI) tests for designing the statistical testing and a new function for utility assessment. We show the superiority of the proposed method against ten standard drift detection methods available in the literature on two wireless network use cases.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 1","pages":"80-93"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11311434","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148510911","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Robust Model Aggregation for Heterogeneous Federated Learning: Analysis and Optimizations 异构联邦学习的鲁棒模型聚合：分析与优化

IF 4.8 2区计算机科学

IEEE Transactions on Emerging Topics in Computing Pub Date : 2026-01-01 Epub Date: 2026-01-12 DOI: 10.1109/TETC.2025.3647650

Yumeng Shao;Jun Li;Long Shi;Kang Wei;Ming Ding;Qianmu Li;Zengxiang Li;Wen Chen;Shi Jin

{"title":"Robust Model Aggregation for Heterogeneous Federated Learning: Analysis and Optimizations","authors":"Yumeng Shao;Jun Li;Long Shi;Kang Wei;Ming Ding;Qianmu Li;Zengxiang Li;Wen Chen;Shi Jin","doi":"10.1109/TETC.2025.3647650","DOIUrl":"https://doi.org/10.1109/TETC.2025.3647650","url":null,"abstract":"Conventional synchronous federated learning (SFL) frameworks suffer from performance degradation in heterogeneous systems due to imbalanced local data size and diverse computing power on the client side. To address this problem, asynchronous FL (AFL) and semi-asynchronous FL have been proposed to recover the performance loss by allowing asynchronous aggregation. However, asynchronous aggregation incurs a new problem of inconsistency between local updates and global updates. Motivated by the issues of conventional SFL and AFL, we first propose a time-driven SFL (T-SFL) framework for heterogeneous systems. The core idea of T-SFL is that the server aggregates the models from different clients, each with varying numbers of iterations, at regular time intervals. To evaluate the learning performance of T-SFL, we provide an upper bound on the global loss function. Further, we optimize the aggregation weights to minimize the developed upper bound. Then, we develop a discriminative model selection (DMS) algorithm that removes local models from clients whose number of iterations falls below a predetermined threshold. In particular, this algorithm ensures that each client’s aggregation weight accurately reflects its true contribution to the global model update, thereby improving the efficiency and robustness of the system. To validate the effectiveness of T-SFL with the DMS algorithm, we conduct extensive experiments using several popular datasets including MNIST, Cifar-10, Fashion-MNIST, and SVHN. The experimental results demonstrate that T-SFL with the DMS algorithm can reduce the latency of conventional SFL by 50%, while achieving an average 3% improvement in learning accuracy over state-of-the-art AFL algorithms.","PeriodicalId":13156,"journal":{"name":"IEEE Transactions on Emerging Topics in Computing","volume":"14 1","pages":"160-171"},"PeriodicalIF":4.8,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"148511233","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0