2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER)最新文献_第3页

Prediction of Network Congestion at Router using Machine learning Technique 基于机器学习技术的路由器网络拥塞预测

2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) Pub Date : 2020-10-30 DOI: 10.1109/DISCOVER50404.2020.9278028

Y. V. Sneha, Vimitha, Vishwasini, Shravan Boloor, N. D. Adesh

{"title":"Prediction of Network Congestion at Router using Machine learning Technique","authors":"Y. V. Sneha, Vimitha, Vishwasini, Shravan Boloor, N. D. Adesh","doi":"10.1109/DISCOVER50404.2020.9278028","DOIUrl":"https://doi.org/10.1109/DISCOVER50404.2020.9278028","url":null,"abstract":"When a burst of packets enters the network, the existing capacity of the network may not be sufficient to support the traffic which leads to congestion in the network. The packet loss is one of the main problems during transmission which affects the performance of the system. If congestion is detected in advance, the packet loss can be avoided by reducing the packet generation rate at source with effective measures. The existing protocols are predefined mapping between the observed state and the corresponding action. When there is a packet drop in the network (observed state), the congestion window is reduced (action) irrespective of other parameters related to the networking environment such as resource utilization by each user, moving average, etc. Therefore, these protocols are unable to adapt their behaviour in the new environment or learn from past experience for better performance. To overcome these issues, the Machine Learning (ML) technique is required in the field of networking to learn from past experience and analyze the current network scenario to take certain actions. ML has the ability to deal with huge amounts of complex data which becomes one of the reasons for applying ML in the field of networking.","PeriodicalId":131517,"journal":{"name":"2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER)","volume":"56 24","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132389761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Computer Vision Based Fish Tracking And Behaviour Detection System 基于计算机视觉的鱼类跟踪与行为检测系统

2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) Pub Date : 2020-10-30 DOI: 10.1109/DISCOVER50404.2020.9278101

S. S, M. M, Ujjwal Verma, R. Pai

{"title":"Computer Vision Based Fish Tracking And Behaviour Detection System","authors":"S. S, M. M, Ujjwal Verma, R. Pai","doi":"10.1109/DISCOVER50404.2020.9278101","DOIUrl":"https://doi.org/10.1109/DISCOVER50404.2020.9278101","url":null,"abstract":"Computer vision-based technologies can be effectively adopted to enhance the performance and productivity of aquaculture industries. Application of these technologies can ease the life of fish farmers and improve the harvest of aquaculture. Fishes are much susceptible to their environment. Small changes in the water quality parameter can increase the mortality rate. Fishes are also known to show abnormal behaviour patterns when experiencing stress. Early detection of these anomalous patterns can avoid commercial losses for aqua fish farmers. Culturing of fish like Sillago-sihama is a tedious and risky task as it is highly sensitive to its environment. On the other hand, it has a high nutrient and commercial value. To this end, an attempt is made to develop a decision support system for identifying abnormal behaviour patterns of Sillago-sihama and thereby assisting the fish farmers to improve productivity. The proposed research detects three behavioural patterns of Sillago-sihama viz. swimming at the surface, no movement and frantic movement patterns. This work proposes a pattern analysis and behaviour identification model using the motion information obtained from tracking by detection method. Extensive experimental results show that the novel approach is reliable in detecting different patterns of Sillago-sihama.","PeriodicalId":131517,"journal":{"name":"2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131334459","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

Lightweight Authentication and Data Encryption Scheme for IoT Applications 物联网应用的轻量级身份验证和数据加密方案

2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) Pub Date : 2020-10-30 DOI: 10.1109/DISCOVER50404.2020.9278048

V. Rao, P. V.

引用次数: 2

Sleep Apnea Classification Using Deep Neural Network 基于深度神经网络的睡眠呼吸暂停分类

2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) Pub Date : 2020-10-30 DOI: 10.1109/DISCOVER50404.2020.9278045

Shyam Vattamthanam, Mrudula G.B, C. S. Kumar

{"title":"Sleep Apnea Classification Using Deep Neural Network","authors":"Shyam Vattamthanam, Mrudula G.B, C. S. Kumar","doi":"10.1109/DISCOVER50404.2020.9278045","DOIUrl":"https://doi.org/10.1109/DISCOVER50404.2020.9278045","url":null,"abstract":"At present, sleep related disorders are very common among the population, due to the varying stress and living habits of the individuals. Obstructive sleep apnea (OSA) is one such serious sleep disorder, where the person experiences a breath cessation while sleeping. An improper or any delayed diagnosis of this disorders can cause severe health issues. This work instigates a sleep apnea classification system using deep neural networks (DNN) using the Heart Rate Variability (HRV) and Respiratory Variability (RRV) features. As an initial step towards the work, a baseline system was developed using the statistical features using SVM as the backend classifier. The dataset was segmented into samples of 2 minutes, the features were extracted from the database, and were given to SVM model which showed an overall accuracy of 62.70% absolute. The patient and stage specific features seen in the PSG data are removed using a feature normalization technique called Covariance Normalization (CVN). Further a deep neural network system with 4 hidden layers were developed using the CVN performed features and it performed with an overall accuracy of 88.03% absolute on the training set and 84.21% absolute on the test set..","PeriodicalId":131517,"journal":{"name":"2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER)","volume":"239 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121166631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

A Real-Time IoT Based Arrhythmia Classifier Using Convolutional Neural Networks 基于卷积神经网络的实时物联网心律失常分类器

2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) Pub Date : 2020-10-30 DOI: 10.1109/DISCOVER50404.2020.9278059

Trivikram Bhat, Akanksha, Shrikara, Shreya Bhat, Manoj T

{"title":"A Real-Time IoT Based Arrhythmia Classifier Using Convolutional Neural Networks","authors":"Trivikram Bhat, Akanksha, Shrikara, Shreya Bhat, Manoj T","doi":"10.1109/DISCOVER50404.2020.9278059","DOIUrl":"https://doi.org/10.1109/DISCOVER50404.2020.9278059","url":null,"abstract":"With one in every four deaths that occur every year being due to a heart-related ailment, it is of utmost importance to study the symptoms, features, and cures for heart diseases so that timely action can be taken to detect and prevent fatalities. Arrhythmia is a type of heart ailment where the heart rate is irregular. It is caused due to erratic behavior of the electrical impulses that control the heartbeat. Detection and classification of arrhythmia are conventionally done manually by expert cardiologists through meticulous analysis of the electrocardiogram (ECG) waveform. Automatic and real-time ECG detection and analysis has gained importance in recent years especially due to the accelerating pace of advances in medical technologies. Therefore, the proposed system takes in data from an ECG sensor module (AD8232) and provides it as input to a trained Convolutional Neural Network (CNN) model in real-time. This model is capable of detecting various types of arrhythmias with accuracy greater than 90%. The classification results are then presented to the user through an interactive mobile application. A caretaker is also a part of the system, who is notified if in case the user's condition turns critical. Although a number of arrhythmia classification systems are implemented, the ease of access by the user and the interactiveness is highly limited. The implementation presented in this paper aims at providing an engaging user experience without compromising the performance and accuracy of measurements and predictions.","PeriodicalId":131517,"journal":{"name":"2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER)","volume":"31 10","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113963629","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Message from the Organizing Chairs 来自组织主席的信息

2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) Pub Date : 2020-10-30 DOI: 10.1109/discover50404.2020.9278007

M. Kulkarni, M. Bhat

引用次数: 0

Message from Shri Shri Vishwavallabha Theertha Shripaadaru 来自Shri Vishwavallabha thertha Shripaadaru的信息

2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) Pub Date : 2020-10-30 DOI: 10.1109/discover50404.2020.9278120

Shri Shri Vishwavallabha, Theertha Shripaadaru

引用次数: 0

Compressor Using Full Swing XOR Logic Gate 压缩机采用全摆幅异或逻辑门

2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) Pub Date : 2020-10-30 DOI: 10.1109/DISCOVER50404.2020.9278076

Sri Harsha Bandarupalli, Bala Pavan Kalyan Bandi, Rahul Kumar Reddy Boggula, Kirti S. Pande

{"title":"Compressor Using Full Swing XOR Logic Gate","authors":"Sri Harsha Bandarupalli, Bala Pavan Kalyan Bandi, Rahul Kumar Reddy Boggula, Kirti S. Pande","doi":"10.1109/DISCOVER50404.2020.9278076","DOIUrl":"https://doi.org/10.1109/DISCOVER50404.2020.9278076","url":null,"abstract":"Compressors are generally used in the second stage of Multiplier i.e. in the reduction of partial products stage, which majorly contributes to the power consumption and delay of the Multiplier. Therefore, Compressor module should be designed efficiently to deliver the best performance in all the aspects. This work introduces a 7:3 Compressor using Full Swing XOR Logic Gate. Various topologies of XOR logic gate using Complementary Pass Transistor logic (CPL), Double Pass Transistor logic (DPL), Feedback based XOR logic gate, Conventional series parallel XOR logic gate, Mirror XOR logic gate and Full Swing XOR logic gate are designed and implemented using gpdk45 models in Cadence Virtuoso at supply voltage of 0.5 V. The performance of these topologies of XOR logic gates is analyzed in terms of delay and average power. It is observed that the Full Swing XOR Logic Gate shows optimum performance in terms of rise time, fall time and average power with respect to the output capacitance contribution. As an application, the 7:3 Compressor is designed using Conventional XOR logic gate, Mirror XOR logic gate and the Full Swing XOR logic gate individually. The performance of these three ways of implementation of 7:3 Compressor is analyzed using gpdk45 models in Cadence Virtuoso at 0.5 V of supply voltage. The analysis shows reduction of 26.28% & 25.44% in average power for 7:3 Compressor using Full Swing XOR gate than the same using Conventional & Mirror XOR logic gates respectively.","PeriodicalId":131517,"journal":{"name":"2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121587351","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Time Response Analysis of Novel Helical Capacitance Level Sensor 新型螺旋电容式液位传感器的时间响应分析

2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) Pub Date : 2020-10-30 DOI: 10.1109/DISCOVER50404.2020.9278051

J. R. Hanni, S. V

{"title":"Time Response Analysis of Novel Helical Capacitance Level Sensor","authors":"J. R. Hanni, S. V","doi":"10.1109/DISCOVER50404.2020.9278051","DOIUrl":"https://doi.org/10.1109/DISCOVER50404.2020.9278051","url":null,"abstract":"Response time is one of the important characteristics of the Capacitance Level Sensor (CLS). It is defined by the time taken for the sensor to respond with respect to change in liquid level. This paper deals with response time analysis as it is related to the steady and dynamic state of the system. Sensor response characteristics alter with respect to steady and dynamic state. Steady and dynamic state of the system is achieved by changing the flow rate of liquid into the process tank. The main objective of the paper is to analyse the steady and dynamic characteristics of novel helical CLS. The results of novel helical CLS of steady and dynamic state is compared with parallel rod and cylindrical CLS. Results show that helical CLS responds quicker as compared to that of parallel rod and cylindrical CLS in both the state analysis because of its novel electrode structure, which easily allows liquid to flow in between the electrodes. Helical CLS responds within 6.89 s, parallel responds by 13.35 s and cylindrical responds by 34.62 s in steady state analysis. Three cases are considered for analysis in dynamic state. Helical CLS shows faster responses in all the three cases as compared to that of other two CLS.","PeriodicalId":131517,"journal":{"name":"2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124882928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

An ontology-based decision support system for nutrition deficiency 基于本体的营养缺乏症决策支持系统

2020 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER) Pub Date : 2020-10-30 DOI: 10.1109/DISCOVER50404.2020.9278069

H. Tejaswini, M. M. Manohara Pai, R. Pai, Girija V. Attigeri, Revathi P. Shenoy

引用次数: 2