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A Novel 1-ϕ, 5-level transformerless inverter with voltage boosting capability 一种新颖的具有升压能力的1- φ， 5电平无变压器逆变器
2017 National Power Electronics Conference (NPEC) Pub Date : 2017-12-01 DOI: 10.1109/NPEC.2017.8310487
G. Bharath, A. Hota, V. Agarwal
{"title":"A Novel 1-ϕ, 5-level transformerless inverter with voltage boosting capability","authors":"G. Bharath, A. Hota, V. Agarwal","doi":"10.1109/NPEC.2017.8310487","DOIUrl":"https://doi.org/10.1109/NPEC.2017.8310487","url":null,"abstract":"This paper presents a new topology for a five level inverter with voltage boost capability and Common Mode Voltage (CMV) elimination. The CMV elimination is achieved by having a common ground between the load and the negative PV terminal. Further, due to the elimination of CMV, the proposed multilevel inverter (MLI) is free from grid leakage current or panel leakage current. The proposed topology is also capable of boosting the voltage using the principle of switched capacitor converters. The presented topology is compared with other existing topologies to prove its superiority. Simulation results are presented to confirm the capability of the proposed MLI. Experiments are underway and those results will be included in the later version of the paper.","PeriodicalId":125885,"journal":{"name":"2017 National Power Electronics Conference (NPEC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116012163","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Design, modelling, fabrication and control of a single-axis attraction type levitation prototype 单轴吸引式悬浮样机的设计、建模、制造和控制
2017 National Power Electronics Conference (NPEC) Pub Date : 2017-12-01 DOI: 10.1109/NPEC.2017.8310441
J. Kundu, M. Sengupta
{"title":"Design, modelling, fabrication and control of a single-axis attraction type levitation prototype","authors":"J. Kundu, M. Sengupta","doi":"10.1109/NPEC.2017.8310441","DOIUrl":"https://doi.org/10.1109/NPEC.2017.8310441","url":null,"abstract":"This paper presents control of an attraction type levitation prototype. A thin steel plate weighing 148 gms has been successfully levitated under an electromagnet with closed-loop position feedback. This has been done without the use of any mechanical restrainer and hence is a significant improvement over previously used methods. The entire set-up has been designed, fabricated, mathematically modelled and analysed. Both electromagnetic and control system analysis have been conducted and a controller has been designed and implemented. A small signal model linearised about the operating point has been used for control system design and implementation.","PeriodicalId":125885,"journal":{"name":"2017 National Power Electronics Conference (NPEC)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122037088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Closed loop speed control of a laboratory fabricated brush-less DC motor drive prototype using position sensor 基于位置传感器的实验室制造无刷直流电动机驱动样机的闭环速度控制
2017 National Power Electronics Conference (NPEC) Pub Date : 2017-12-01 DOI: 10.1109/NPEC.2017.8310453
P. Mukherjee, M. Sengupta
{"title":"Closed loop speed control of a laboratory fabricated brush-less DC motor drive prototype using position sensor","authors":"P. Mukherjee, M. Sengupta","doi":"10.1109/NPEC.2017.8310453","DOIUrl":"https://doi.org/10.1109/NPEC.2017.8310453","url":null,"abstract":"This paper presents steps and procedures of designing a closed loop speed controller for a surface mounted permanent magnet(SM-PM) brush-less DC machine(BLDC). The closed-loop speed control technique has been implemented using Hall-effect position sensor. The BLDC motor control algorithm has been modelled and simulated first. The same has been thereafter practically implemented on a 0.75 hp, 1500 r.p.m BLDC motor that was designed and developed as a lab prototype. Both the simulation and the experimental results are in excellent in agreements.","PeriodicalId":125885,"journal":{"name":"2017 National Power Electronics Conference (NPEC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116823861","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A three-level inverter configuration for pole-phase modulated nine-phase induction motor drives with single DC link 三电平逆变器配置的极相调制九相感应电机驱动器与单直流链路
2017 National Power Electronics Conference (NPEC) Pub Date : 2017-12-01 DOI: 10.1109/NPEC.2017.8310458
B. Reddy, Sivakumar Keerthipati
{"title":"A three-level inverter configuration for pole-phase modulated nine-phase induction motor drives with single DC link","authors":"B. Reddy, Sivakumar Keerthipati","doi":"10.1109/NPEC.2017.8310458","DOIUrl":"https://doi.org/10.1109/NPEC.2017.8310458","url":null,"abstract":"This paper proposes a 3-level inverter scheme with a single dc source to enhance the performance of pole phase modulated multiphase induction motor drives (PPMMIM). Each phase of the traditional 9-0 4-pole induction motor (IM) has two series connected identical voltage profile coils (IVPC) with a span of two pole-pitches. These two IVPC's are disconnected and reconnected as two 9-phase star groups, which are excited with 9-0 2-level inverters separately. But these inverters are connected to the common-dc link. The dc-link requirement of the 9-0 IM drive is reduced by 6 times as compared with the traditional 3-0 IM drive. In high pole operation, PPMMIM drives supplies huge starting torque with reduced phase count, which increases the magnitude space harmonics in air gap. With the help of phase shifted carrier space-vector pulse width modulation (SVPWM) the proposed MLI scheme produces the multilevel voltage across the effective phase. The first center band harmonics in the effective voltage are cancelled because of the 1800 phase shifted references. In addition, the other center band harmonics are moved to the higher order of frequencies due to phase shifted carriers. This improvement in harmonic profile as well as multilevel voltage excitation improves the performance of the PPMMIM drive in 12-pole mode. In low pole mode, the dc-link voltage utilization (DLVU) of the MIM drive is enhanced by 15.4% with the help of third harmonic injected SVPWM. A 5hp 9-0 4-pole FEM model is designed in Ansys Maxwell 2-D for validating the proposed MLI configuration. This configuration is also verified by using laboratory prototype.","PeriodicalId":125885,"journal":{"name":"2017 National Power Electronics Conference (NPEC)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129003901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Analysis of series and parallel tank for dual active bridge single phase inverter application 串联与并联槽在双有源桥式单相逆变器中的应用分析
2017 National Power Electronics Conference (NPEC) Pub Date : 2017-12-01 DOI: 10.1109/NPEC.2017.8310468
Bhavit Pant, Utsab Kundu, P. Sensarma
{"title":"Analysis of series and parallel tank for dual active bridge single phase inverter application","authors":"Bhavit Pant, Utsab Kundu, P. Sensarma","doi":"10.1109/NPEC.2017.8310468","DOIUrl":"https://doi.org/10.1109/NPEC.2017.8310468","url":null,"abstract":"This paper presents an analytical comparison of series and parallel resonant tank networks to investigate their suitability for dual-active bridge based single phase inverter application. The operating principle and modulation strategy for dual-active-bridge based inverter are explained. Defining appropriate base quantities, normalized frequency domain analyses are carried out for both series and parallel tanks. Structured derivations for the ratio of peak tank current to average input current are presented for both these tank networks. Simulation and experimental results are presented to validate the analytical predictions regarding the current ratio.","PeriodicalId":125885,"journal":{"name":"2017 National Power Electronics Conference (NPEC)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129253302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Grid connected five level cascaded H bridge inverter as shunt active power filter 并网五电平级联H桥逆变器作为并联有源电力滤波器
2017 National Power Electronics Conference (NPEC) Pub Date : 2017-12-01 DOI: 10.1109/NPEC.2017.8310435
Vidyasagar Tummakuri, B. Das, P. Kasari, A. Chakraborti
{"title":"Grid connected five level cascaded H bridge inverter as shunt active power filter","authors":"Vidyasagar Tummakuri, B. Das, P. Kasari, A. Chakraborti","doi":"10.1109/NPEC.2017.8310435","DOIUrl":"https://doi.org/10.1109/NPEC.2017.8310435","url":null,"abstract":"This paper articulates the comparative study and performance evaluation of the grid synchronized five level cascaded H bridge inverter (CHBI) with different pulse width modulation (PWM) techniques, as a shunt active power filter (SAPF) with Synchronous reference frame (SRF) control method which compensates load current harmonics, zero sequence current and regulates reactive power for power quality improvement. The substantial simulation study has been executed to assess the efficiency of the proposed control strategy for the optimum utilization of SAPF which is energized by a constant DC voltage bus. The merits and demerits of two level inverter will be compared with five level CHBI as a SAPF. A carrier based current control is espoused to maintain the line currents in phase with the grid voltages. The results will be tabulated for quantitative analysis. All the simulations were executed by using MATLAB / SIMULINK.","PeriodicalId":125885,"journal":{"name":"2017 National Power Electronics Conference (NPEC)","volume":"70 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120918054","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
High gain bidirectional DC-DC converter with reduced component count 高增益双向DC-DC变换器与减少元件计数
2017 National Power Electronics Conference (NPEC) Pub Date : 2017-12-01 DOI: 10.1109/NPEC.2017.8310477
Lalitha Darbha, P. Parthiban
{"title":"High gain bidirectional DC-DC converter with reduced component count","authors":"Lalitha Darbha, P. Parthiban","doi":"10.1109/NPEC.2017.8310477","DOIUrl":"https://doi.org/10.1109/NPEC.2017.8310477","url":null,"abstract":"Solar Photovoltaic system as a source and battery as an intermediary load necessitates the development of bidirectional dc-dc converter. Conventional battery loads are rated at 12 V to 48 V. High gain is required both in step up and step down modes to supply the ac grid or charge from the grid. Conventional isolated transformer based topologies can be designed with high gain at the expense of increase in component count and requirement of snubber circuits for protection as the leakage inductance causes a spike across the switch resulting in losses, complex control schemes and the requirement of over rated components. Non isolated converter circuits with coupled inductors are used for low power systems. The size of the converter, magnetic losses increase with increase in the inductance for higher power capability. The proposed converter is a non isolated converter requiring minimum number of switches. Various operating modes and the analysis of the converter are discussed. Simulation results of the system with MATLAB and PSIM are presented.","PeriodicalId":125885,"journal":{"name":"2017 National Power Electronics Conference (NPEC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127719455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Design constraints of multiphase induction motor drives for electric vehicles 电动汽车多相感应电动机驱动的设计约束
2017 National Power Electronics Conference (NPEC) Pub Date : 2017-12-01 DOI: 10.1109/NPEC.2017.8310464
G. V. Vardhan Reddy, B. Reddy, K. Sivakumar
{"title":"Design constraints of multiphase induction motor drives for electric vehicles","authors":"G. V. Vardhan Reddy, B. Reddy, K. Sivakumar","doi":"10.1109/NPEC.2017.8310464","DOIUrl":"https://doi.org/10.1109/NPEC.2017.8310464","url":null,"abstract":"With the advent of enhanced speed-torque characteristics, high efficiency, fault tolerant capability and high power handling capability with reduced ratings of semi-conductor devices the multi-phase induction machines are gaining more attention in high-power applications. This paper mainly aims the design of pole-phase modulated induction motor drives (PPMMIM), by considering the all-opposing forces acting the vehicle. With the help of vehicle dynamic equations, the required torque and power rating of the machine are calculated to attain the vehicle speed of 150 km/h. Optimal design considerations of the three-speed and five-speed PPMMIM's are presented to achieve this rated speed and toque requirements. Moreover, the extended speed-toque capability of the PPMMIM drive will helps to eliminate the gearbox in conventional IC engine based vehicles. The performance parameters of these 3-speed and 5-speed PPMMIM driven vehicles verified with the help of MATLAB simulation. A similar kind of simulation study carried out for IC engine based vehicles also to compare the performance characteristics of PPMMIM driven electric vehicle.","PeriodicalId":125885,"journal":{"name":"2017 National Power Electronics Conference (NPEC)","volume":"145 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132196193","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Design, analysis, FEM validation and fabrication of a switched reluctance motor 开关磁阻电机的设计、分析、有限元验证和制造
2017 National Power Electronics Conference (NPEC) Pub Date : 2017-12-01 DOI: 10.1109/NPEC.2017.8310452
D. Roy, Sk. Mainuddin, M. Sengupta
{"title":"Design, analysis, FEM validation and fabrication of a switched reluctance motor","authors":"D. Roy, Sk. Mainuddin, M. Sengupta","doi":"10.1109/NPEC.2017.8310452","DOIUrl":"https://doi.org/10.1109/NPEC.2017.8310452","url":null,"abstract":"This paper deals with design, analysis and fabrication of a 4 phase, 48 V, 1 hp, 3000 rpm 8/6 SRM. The motor design process includes rigorous hand calculation which is followed by computer iterations for design modification. The design has been validated using available standard FEM software. A non-linear analytical model of the motor is developed to predict and compare the performance with the FEM results, at rated load. The analytical model utilizes Pohl's method of inductance calculation to obtain the air gap inductance profile. The same is compared with the inductance profile obtained from FE analysis and found in good agreement. This paper also presents a brief comparison between the “Overlap method” and “Pohl's method” of air gap inductance calculation. Hardware test results of the fabricated motor are presented.","PeriodicalId":125885,"journal":{"name":"2017 National Power Electronics Conference (NPEC)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115798950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A modified single phase H-bridge multilevel inverter topology for photovoltaic applications 一种用于光伏应用的改进单相h桥多电平逆变器拓扑
2017 National Power Electronics Conference (NPEC) Pub Date : 2017-12-01 DOI: 10.1109/NPEC.2017.8310482
Pratik Kumar Kar, Anurag Priyadarshi, S. Karanki
{"title":"A modified single phase H-bridge multilevel inverter topology for photovoltaic applications","authors":"Pratik Kumar Kar, Anurag Priyadarshi, S. Karanki","doi":"10.1109/NPEC.2017.8310482","DOIUrl":"https://doi.org/10.1109/NPEC.2017.8310482","url":null,"abstract":"In this paper, a modified single phase H-bridge MLI has been presented which uses reduced number of power semiconductor devices. The proposed topology is able to work in both symmetrical and asymmetrical mode. In this paper, the performance of the proposed topology with equal and unequal voltage source has been presented. The circuit configuration of the proposed topology has also been presented with its various modes of operation. Furthermore, the operation of the proposed topology has been compared with two different switching techniques, such as pulse width modulation and selective harmonic elimination technique. The total harmonics in the output voltage and current have also been presented at different loading condition by the proposed topology. The MATLAB/SIMULINK simulation results has been presented with detailed analysis for validation.","PeriodicalId":125885,"journal":{"name":"2017 National Power Electronics Conference (NPEC)","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114311585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
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