Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems最新文献_第2页

WCET Analysis meets Virtual Prototyping: Improving Source-Level Timing Annotations WCET分析满足虚拟样机:改进源级定时注释

Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems Pub Date : 2019-05-27 DOI: 10.1145/3323439.3323978

M. Becker, Marius Pazaj, S. Chakraborty

{"title":"WCET Analysis meets Virtual Prototyping: Improving Source-Level Timing Annotations","authors":"M. Becker, Marius Pazaj, S. Chakraborty","doi":"10.1145/3323439.3323978","DOIUrl":"https://doi.org/10.1145/3323439.3323978","url":null,"abstract":"In this paper we discuss the problem of relating machine instructions to source level constructs, and how it has been addressed in the domains of Virtual Prototyping (VP) and Worst-Case Execution Time (WCET) analysis. It has been handled in different ways, although the goals and requirements between both domains are not far from another. This paper shows that there exists a mutual benefit in exchanging solutions between the two research domains, by demonstrating the applicability and utility of VP methods for WCET analysis, and highlighting their shortcomings. After an evaluation of existing methods, we carefully rework and combine them to a sound and generic mapping algorithm for source-level WCET analysis. As a result, we obtain WCET estimates that outperform classic binary analyzers especially under moderate compiler optimization. Our approach is based on hierarchical flow matching, control-dependency- and dominator-homomorphic maps, and dominator lumping to soundly fill the gaps in the mapping. WCET estimation is performed using Model Checking, which maximally exploits the information available in the source, and highlights remaining weaknesses in the mapping methods. Last but not least, we discuss further chances of synergy between both research communities which could enable support for more complex microarchitectures with caches, pipelines and speculative execution in both source-level WCET analysis and VP.","PeriodicalId":125133,"journal":{"name":"Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130668632","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Reachability Analysis of Hybrid Automata with Clocked Linear Dynamics 带时钟线性动力学的混合自动机可达性分析

Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems Pub Date : 2019-05-27 DOI: 10.1145/3323439.3323980

V. S. E. Hakim, M. Bekooij

{"title":"Reachability Analysis of Hybrid Automata with Clocked Linear Dynamics","authors":"V. S. E. Hakim, M. Bekooij","doi":"10.1145/3323439.3323980","DOIUrl":"https://doi.org/10.1145/3323439.3323980","url":null,"abstract":"Disributed control systems often exhibit aperiodic sampling behavior due to varying communication delays and execution times. In such cases traditional analysis methods fall short because the functional and temporal behaviors need to be analyzed simultaneously. Therefore such systems are often modeled by Hybrid Automata (HA) with clock and non-clock variables, and verified using reachability analysis. However, modern reachability tools introduce a large overapproximation error because non-clock variables, as well as clock variables, are equally treated by the algorithm. In this paper we present a reachability algorithm which exploits the explicit separation of clock and non-clock variables in the Hybrid Automata with Clocked Linear Dynamics (HA-CLD) subclass, as well as restricting that guard and invariant constraints can only be specified in the HA-CLD model for clock variables. These properties of HA-CLD allow independent computation of tight reachable set over-approximations, in the form of flow-pipes, of clock and non-clock variables. A computationaly efficient and tight intersection operation is obtained by relating segments of the clock flow-pipe with segments of the non-clock flow-pipe. We demonstrate the effectiveness of our approach using two benchmarks, in the context of verifying stability. From the results it can be concluded that our reachability approach obtains significantly tighter results with an up-to 65 times smaller run-time compared to the start-of-the-art model checker SpaceEx.","PeriodicalId":125133,"journal":{"name":"Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116992329","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Multi-Objective Optimization for the Compiler of Real-Time Systems based on Flower Pollination Algorithm 基于花授粉算法的实时系统编译器多目标优化

Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems Pub Date : 2019-05-27 DOI: 10.1145/3323439.3323977

Shashank Jadhav, H. Falk

引用次数: 6

Memory and Parallelism Analysis Using a Platform-Independent Approach 使用平台无关方法的内存和并行性分析

Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems Pub Date : 2019-04-18 DOI: 10.1145/3323439.3323988

Stefano Corda, Gagandeep Singh, Ahsan Javed Awan, Roel Jordans, H. Corporaal

引用次数: 7

Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems 第22届嵌入式系统软件与编译器国际研讨会论文集

Proceedings of the 22nd International Workshop on Software and Compilers for Embedded Systems Pub Date : 1900-01-01 DOI: 10.1145/3323439

引用次数: 0