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2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST)最新文献

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A Low-Latency Syndrome-based Deep Learning Decoder Architecture and its FPGA Implementation 一种基于低延迟综合征的深度学习解码器架构及其FPGA实现
2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST) Pub Date : 2022-06-08 DOI: 10.1109/mocast54814.2022.9837752
E. Kavvousanos, Vassilis Paliouras
{"title":"A Low-Latency Syndrome-based Deep Learning Decoder Architecture and its FPGA Implementation","authors":"E. Kavvousanos, Vassilis Paliouras","doi":"10.1109/mocast54814.2022.9837752","DOIUrl":"https://doi.org/10.1109/mocast54814.2022.9837752","url":null,"abstract":"Recently, Machine Learning has been considered as an alternative design paradigm for various communications sub-systems. However, the works that have assessed the performance of these methods beyond the algorithmic level are limited. In this paper, we implement in hardware and evaluate the performance of the Syndrome-based Deep Learning Decoder for a BCH(63,45) code in terms of throughput rate and latency. The implemented Neural Network is compressed by applying pruning, clustering and quantization to an 8-bit fixed-point representation, with no significant loss in its BER performance, while achieving 90% weight sparsity in each layer. An FPGA architecture is designed for the decoder which exploits the compressed structure of the Neural Network in order to accelerate the underlying computations with moderate hardware requirements. Experimental results are provided which show that the decoder achieves latency less than a tenth of a millisecond and a throughput rate up to 5 Mbps, substantially outperforming previous implementations by 30×.","PeriodicalId":122414,"journal":{"name":"2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121901535","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A low power low noise 65nm charge pump using mismatch compensation and smoothing capacitor 采用失配补偿和平滑电容的低功耗低噪声65nm电荷泵
2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST) Pub Date : 2022-06-08 DOI: 10.1109/mocast54814.2022.9837615
D. Samaras, A. Hatzopoulos
{"title":"A low power low noise 65nm charge pump using mismatch compensation and smoothing capacitor","authors":"D. Samaras, A. Hatzopoulos","doi":"10.1109/mocast54814.2022.9837615","DOIUrl":"https://doi.org/10.1109/mocast54814.2022.9837615","url":null,"abstract":"This work presents a Charge Pump circuit using active current mismatch compensation, which exhibits low power, low noise and good linearity for integer or fractional -N PLL. The proposed charge pump has a Vctrl range of 0.3V to 0.75V, 1.135 × 10-24 A2/Hz output current noise and current mismatch below 0.01%. Additionally, it includes a smoothing capacitor to reduce the transient phenomena which generate non-linearity. The layout dimensions of the proposed charge pump is 88um x 80um. Finally, the charge pump is designed using 65nm TSMC process with a supply voltage of 1V and power consumption of 309uW at 150uA current output.","PeriodicalId":122414,"journal":{"name":"2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133141325","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
HashPIM: High-Throughput SHA-3 via Memristive Digital Processing-in-Memory HashPIM:基于内存中的记忆数字处理的高吞吐量SHA-3
2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST) Pub Date : 2022-05-26 DOI: 10.48550/arXiv.2205.13559
Batel Oved, Orian Leitersdorf, R. Ronen, Shahar Kvatinsky
{"title":"HashPIM: High-Throughput SHA-3 via Memristive Digital Processing-in-Memory","authors":"Batel Oved, Orian Leitersdorf, R. Ronen, Shahar Kvatinsky","doi":"10.48550/arXiv.2205.13559","DOIUrl":"https://doi.org/10.48550/arXiv.2205.13559","url":null,"abstract":"Recent research has sought to accelerate cryptographic hash functions as they are at the core of modern cryptography. Traditional designs, however, suffer from the von Neumann bottleneck that originates from the separation of processing and memory units. An emerging solution to overcome this bottleneck is processing-in-memory (PIM): performing logic within the same devices responsible for memory to eliminate data-transfer and simultaneously provide massive computational parallelism. In this paper, we seek to vastly accelerate the state-of-the-art SHA-3 cryptographic function using the memristive memory processing unit (mMPU), a general-purpose memristive PIM architecture. To that end, we propose a novel in-memory algorithm for variable rotation, and utilize an efficient mapping of the SHA-3 state vector for memristive crossbar arrays to efficiently exploit PIM parallelism. We demonstrate a massive energy efficiency of 1, 422 Gbps/W, improving a state-of-the-art memristive SHA-3 accelerator (SHINE-2) by 4.6 ×.","PeriodicalId":122414,"journal":{"name":"2022 11th International Conference on Modern Circuits and Systems Technologies (MOCAST)","volume":"26 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-05-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132193337","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
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