2012 Ninth International Conference on Information Technology - New Generations最新文献_第8页

Defining Virtual Worlds Usability Heuristics 定义虚拟世界可用性启发式

2012 Ninth International Conference on Information Technology - New Generations Pub Date : 2012-04-16 DOI: 10.1109/ITNG.2012.138

R. Muñoz-Soto, Virgínia Chalegre

引用次数: 15

XML Querying Using Data Logic Structures and Primitives 使用数据逻辑结构和原语的XML查询

2012 Ninth International Conference on Information Technology - New Generations Pub Date : 2012-04-16 DOI: 10.1109/ITNG.2012.119

J. U. Quevedo-Torrero, G. Erickson

引用次数: 2

A Unicast MANET Routing Protocol to Simultaneously Minimize the Stability-Hop Count Tradeoff and End-to-End Delay 一种同时最小化稳定跳数权衡和端到端延迟的单播MANET路由协议

2012 Ninth International Conference on Information Technology - New Generations Pub Date : 2012-04-16 DOI: 10.1109/ITNG.2012.17

N. Meghanathan

{"title":"A Unicast MANET Routing Protocol to Simultaneously Minimize the Stability-Hop Count Tradeoff and End-to-End Delay","authors":"N. Meghanathan","doi":"10.1109/ITNG.2012.17","DOIUrl":"https://doi.org/10.1109/ITNG.2012.17","url":null,"abstract":"The high-level contribution of this paper is the design and development of a unicast routing protocol to effectively minimize the stability-hop count tradeoff observed in mobile ad hoc networks (MANETs) and thereby incur lower end-to-end delay per data packet. The proposed unicast routing protocol, referred to as SILET, uses the predicted link expiration times (LETs) as part of the link weights. SILET is a source-initiated on-demand routing protocol that initiates a global broadcast query-reply cycle to discover routes, the destination chooses the route with the lowest sum of the link weights, the weight assigned to a link is '1' plus the inverse of the LET of the link. The term '1' as part of the link weight minimizes the hop count per path and the term comprising of the inverse of the LET maximizes the lifetime of the routes. Through extensive simulations and comparison with contemporary minimum-hop based and stability-based routing protocols, we demonstrate that SILET discovers long-living stable routes with hop count close to that of the minimum, thus, minimizing the stability-hop count tradeoff. By virtue of incurring lower route discovery control overhead (due to long-living stable routes) and lower hop count per route, the end-to-end delay per data packet is also optimized and has been observed to be the lowest among all the routing protocols simulated in this paper.","PeriodicalId":117236,"journal":{"name":"2012 Ninth International Conference on Information Technology - New Generations","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115926494","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 10

Visualization of Digital Audio Watermarking Based on the Dyadic Wavelet Transform 基于二进小波变换的数字音频水印可视化

2012 Ninth International Conference on Information Technology - New Generations Pub Date : 2012-04-16 DOI: 10.1109/ITNG.2012.84

Teruya Minamoto, Yuji Ogata, Masahiro Sawai

引用次数: 3

A Design of Mutual Exclusion Protocol in Cellular Wireless Networks 蜂窝无线网络中互斥协议的设计

2012 Ninth International Conference on Information Technology - New Generations Pub Date : 2012-04-16 DOI: 10.1109/ITNG.2012.166

Sunghoon Park, Seoun-Hyung Lee

引用次数: 1

Rule-based Management of Large Unorganized Data Sets 基于规则的大型无组织数据集管理

2012 Ninth International Conference on Information Technology - New Generations Pub Date : 2012-04-16 DOI: 10.1109/ITNG.2012.66

D. Beatty, N. Lopez-Benitez

引用次数: 1

Development and Implementation of a Chat Bot in a Social Network 社交网络中聊天机器人的开发与实现

2012 Ninth International Conference on Information Technology - New Generations Pub Date : 2012-04-16 DOI: 10.1109/ITNG.2012.147

Salto Martínez Rodrigo, Jacques Abraham

引用次数: 18

A Hardware-Software Integrated Design for a High-Performance Java Processor 高性能Java处理器的软硬件集成设计

2012 Ninth International Conference on Information Technology - New Generations Pub Date : 2012-04-16 DOI: 10.1109/ITNG.2012.174

A. Fong, C. Yau, Yijun Liu

{"title":"A Hardware-Software Integrated Design for a High-Performance Java Processor","authors":"A. Fong, C. Yau, Yijun Liu","doi":"10.1109/ITNG.2012.174","DOIUrl":"https://doi.org/10.1109/ITNG.2012.174","url":null,"abstract":"Today object-oriented programming (OOP) is becoming more and more popular than ever, due to Internet and network computing, and need for resource sharing. Java becomes attractive because of its appealing features such as platform independence and code reusability. However, Java has lower performance than conventional programming languages due to its real-time execution overheads in the layer of Java Virtual Machine (JVM). With increasing performance through higher clock speed or multi-cores, software virtual machines are still needed to run on top of the operating system to execute Java, reducing the effect of the hardware performance improvements. This research proposes a high-performance computer architecture with hybrid system co-design for Java processing. Our FPGA model implemented in VHDL, jHISC, originates hardware support for object-oriented bytecodes, object referencing and method invocation. Moreover, baseline compiler is developed to construct the core structure and to ensure the architecture compatible to the JVM specifications. The project is at present version 4, which is target for mobile and embedded computing. Comparing with the products by Sun Microsystems through evaluation based on SPEC JVM98 benchmark, jHISC V4.0 provide overall performance gain of around 137% over HotSpot JVM and 102% to 1351% over picoJava II.","PeriodicalId":117236,"journal":{"name":"2012 Ninth International Conference on Information Technology - New Generations","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128130531","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Performance-Sensitivity-based Workload Tailoring for Effective Design Exploration 基于性能敏感性的有效设计探索的工作量裁剪

2012 Ninth International Conference on Information Technology - New Generations Pub Date : 2012-04-16 DOI: 10.1109/ITNG.2012.112

Jie Luo, Yilin Zhang, S. Vadlamani, Byeong Kil Lee

{"title":"Performance-Sensitivity-based Workload Tailoring for Effective Design Exploration","authors":"Jie Luo, Yilin Zhang, S. Vadlamani, Byeong Kil Lee","doi":"10.1109/ITNG.2012.112","DOIUrl":"https://doi.org/10.1109/ITNG.2012.112","url":null,"abstract":"Early-stage design exploration requires the detailed simulation which is running applications on a cycle-level microprocessor simulator. Main objectives of simulation-level design exploration include understanding the architectural behaviors of target applications and finding optimal configurations to cover wide range of applications in terms of performance and power. However, full simulation of an industry standard benchmark suite (e.g., SPEC CPU 2006) takes several weeks to months to complete. This problem has motivated several research groups to come up with methodologies to reduce simulation time while maintaining a certain level of accuracy. Among many techniques for reducing simulation time, a tool called Sim Point is popularly used. However, simulation load even with the reduced workloads is still heavy, considering design complexity of modern microprocessors. Basic motivation of this research is started from how design exploration is actually performed. Designers will observe the performance impact from resource variations or configuration changes. If a simulation point shows low sensitivity to resource variations, designers would eliminate those simulation points from the simulation setup procedure. In this paper, we focus on identifying those simulation points which have high sensitivity or low sensitivity, by which overall simulation methodology can be effectively improved. We also performed the performance-sensitivity-based similarity analysis (grouping) among simulation points on specific performance metric which can be an overall performance metric or a component-level metric.","PeriodicalId":117236,"journal":{"name":"2012 Ninth International Conference on Information Technology - New Generations","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121625560","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Generator Flow: An XML Configurable Design Pattern Used in NoGAP 生成器流:NoGAP中使用的XML可配置设计模式

2012 Ninth International Conference on Information Technology - New Generations Pub Date : 2012-04-16 DOI: 10.1109/ITNG.2012.48

Per Karlström, Wenbiao Zhou

{"title":"Generator Flow: An XML Configurable Design Pattern Used in NoGAP","authors":"Per Karlström, Wenbiao Zhou","doi":"10.1109/ITNG.2012.48","DOIUrl":"https://doi.org/10.1109/ITNG.2012.48","url":null,"abstract":"A golden rule that must be followed when building any larger system, is to manage complexity. Without complexity management a system can only grow to a certain point before it collapses under its own complexity. One complexity management technique is the use of design patterns, which are architectural constructs that have proven their usefulness in handling certain design problems. This paper will describe Generator Flow, a design pattern used in No GAP an EDA tool developed at the department of EE, Linköping University. Generator Flow is a design pattern aimed at handling a succession of transformations performed on a number of data sets to reach some useful outputs. This paper also describes the XML based flow-configuration file, which is used to allow for runtime configuration of the transformation flow used in No GAP. No GAP is an EDA tool aimed at easing the design and verification of ASIP and programmable hardware accelerators. A problem faced when developing No GAP was how to handle the flow of transformations, from an input specification to useful outputs. It was in this context that the Generator Flow pattern was developed.","PeriodicalId":117236,"journal":{"name":"2012 Ninth International Conference on Information Technology - New Generations","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114886294","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0