2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems最新文献_第6页

Effective Post-BIST Fault Diagnosis for Multiple Faults 有效的多故障后bist故障诊断

2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2006-10-04 DOI: 10.1109/DFT.2006.24

Hiroshi Takahashi, Shuhei Kadoyama, Y. Higami, Y. Takamatsu, K. Yamazaki, T. Aikyo, Yasuo Sato

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引用次数: 1

NoC Interconnect Yield Improvement Using Crosspoint Redundancy 利用交叉点冗余提高NoC互连成品率

2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2006-10-04 DOI: 10.1109/DFT.2006.46

C. Grecu, A. Ivanov, R. Saleh, P. Pande

引用次数: 32

Soft Error Masking Circuit and Latch Using Schmitt Trigger Circuit 采用施密特触发电路的软错误掩蔽电路和锁存器

2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2006-10-04 DOI: 10.1109/DFT.2006.60

Yoichi Sasaki, K. Namba, Hideo Ito

引用次数: 75

VLSI Implementation of a Fault-Tolerant Distributed Clock Generation 一种容错分布式时钟生成的VLSI实现

2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2006-10-04 DOI: 10.1109/DFT.2006.67

M. Ferringer, Gottfried Fuchs, A. Steininger, G. Kempf

引用次数: 27

Testing Reversible 1D Arrays for Molecular QCA 分子QCA可逆1D阵列的测试

2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2006-10-04 DOI: 10.1109/DFT.2006.63

Xiaojun Ma, Jing Huang, C. Metra, F. Lombardi

引用次数: 38

Online hardening of programs against SEUs and SETs 针对seu和set的在线加固程序

2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2006-10-04 DOI: 10.1109/DFT.2006.49

C. Lisbôa, L. Carro, M. Reorda, M. Violante

引用次数: 12

Reliability Analysis of Self-Repairable MEMS Accelerometer 自修复MEMS加速度计的可靠性分析

2006 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems Pub Date : 2006-10-04 DOI: 10.1109/DFT.2006.54

X. Xiong, Yu-Liang Wu, W. Jone

引用次数: 16