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2010 IEEE International Behavioral Modeling and Simulation Workshop最新文献

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Circuit synthesizable guaranteed passive modeling for multiport structures 多端口结构的电路综合保证无源建模
2010 IEEE International Behavioral Modeling and Simulation Workshop Pub Date : 2010-09-01 DOI: 10.1109/BMAS.2010.6156592
Z. Mahmood, L. Daniel
{"title":"Circuit synthesizable guaranteed passive modeling for multiport structures","authors":"Z. Mahmood, L. Daniel","doi":"10.1109/BMAS.2010.6156592","DOIUrl":"https://doi.org/10.1109/BMAS.2010.6156592","url":null,"abstract":"In this paper we present a highly efficient algorithm to automatically generate circuit synthesizable dynamical models for passive multiport structures. The algorithm is based on a natural convex relaxation of the original nonconvex problem of modeling multiport devices from frequency response data, subject to global passivity constraints. The algorithm identifies a collection of first and second order passive networks interconnected in either series or parallel fashion. Passive models for several multiport structures, including Wilkinson type combiners, power and ground distribution grids and coupled on-chip inductors are provided to corroborate the theoretical development and show efficacy of the implemented algorithm. To demonstrate the practical usage of our algorithm, the identified models are also interfaced with commercial simulators and used to perform time domain simulations while being connected to highly nonlinear power amplifiers.","PeriodicalId":112947,"journal":{"name":"2010 IEEE International Behavioral Modeling and Simulation Workshop","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125115826","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
Hierarchical generation of pin accurate SystemC models based on RF circuit schematics 基于射频电路原理图的引脚精确系统模型分层生成
2010 IEEE International Behavioral Modeling and Simulation Workshop Pub Date : 2010-09-01 DOI: 10.1109/BMAS.2010.6156593
Yifan Wang, Zhimiao Chen, S. Heinen
{"title":"Hierarchical generation of pin accurate SystemC models based on RF circuit schematics","authors":"Yifan Wang, Zhimiao Chen, S. Heinen","doi":"10.1109/BMAS.2010.6156593","DOIUrl":"https://doi.org/10.1109/BMAS.2010.6156593","url":null,"abstract":"This paper presents a method to generate pin accurate SystemC models based on the RF circuit schematics, using a SKILL [1] based routine. This method addresses the verification and modeling of the analog/RF circuits in the event driven digital domain using SystemC, based on the same data base created by the circuit designer. The proposed method was employed to model a specific test case, comprising a phase locked loop in a RF receiver chain. The reliability of the SystemC models have been proven by comparing the simulation results with the Verilog-AMS(wreal) models. The pin accurate SystemC models were found to be well suited for top down design, virtual prototyping and verification in SoC implementation. Additionally, the SystemC models are very efficient regarding the simulation speed and flexibility to pass abstract data types with real numbers through the ports.","PeriodicalId":112947,"journal":{"name":"2010 IEEE International Behavioral Modeling and Simulation Workshop","volume":"503 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134128881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Design and modeling of a successive approximation ADC for the electrostatic harvester of vibration energy 静电振动能量采集器逐次逼近ADC的设计与建模
2010 IEEE International Behavioral Modeling and Simulation Workshop Pub Date : 2010-09-01 DOI: 10.1109/BMAS.2010.6156599
R. Khalil, A. Dudka, D. Galayko, R. Iskander, P. Basset
{"title":"Design and modeling of a successive approximation ADC for the electrostatic harvester of vibration energy","authors":"R. Khalil, A. Dudka, D. Galayko, R. Iskander, P. Basset","doi":"10.1109/BMAS.2010.6156599","DOIUrl":"https://doi.org/10.1109/BMAS.2010.6156599","url":null,"abstract":"This paper presents a functional design and modeling of a successive approximation analog-to-digital converter (ADC) and its application in the conditioning circuit of the vibration energy harvester. The paper published on BMAS'09 highlighted the necessity of a smart digital control to calibrate the system, which requires in turn an ultra low power supplied ADC. The harvester and the ADC are designed using a CMOS 0.35µm High Voltage technology and modeled in a mixed VHDL-AMS/ELDO environment. The supply voltage of the ADC is 2.5V. The whole system was simulated using a mixed signal AdvanceMS simulator.","PeriodicalId":112947,"journal":{"name":"2010 IEEE International Behavioral Modeling and Simulation Workshop","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132701059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Modeling jitter in Continuous-Time sigma-delta modulators 连续时间σ - δ调制器抖动建模
2010 IEEE International Behavioral Modeling and Simulation Workshop Pub Date : 2010-09-01 DOI: 10.1109/BMAS.2010.6156598
A. Ashry, H. Aboushady
{"title":"Modeling jitter in Continuous-Time sigma-delta modulators","authors":"A. Ashry, H. Aboushady","doi":"10.1109/BMAS.2010.6156598","DOIUrl":"https://doi.org/10.1109/BMAS.2010.6156598","url":null,"abstract":"In this paper, a fast and accurate technique for modeling and simulation of clock jitter in Continuous-Time sigma-delta (ΣΔ) modulators is introduced. In addition to its high speed compared to the traditional jitter simulation method, the proposed technique is still continuous-time based which is more convenient than discrete-time based jitter modeling suggested in other publications. Mathematical principle of the proposed technique as well as simulations results are presented and compared to other simulation techniques.","PeriodicalId":112947,"journal":{"name":"2010 IEEE International Behavioral Modeling and Simulation Workshop","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125418326","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
BER and power consumption estimation based on hierarchical modeling of a 2.4 GHz power amplifier 基于分层建模的2.4 GHz功率放大器误码率和功耗估计
2010 IEEE International Behavioral Modeling and Simulation Workshop Pub Date : 2010-09-01 DOI: 10.1109/BMAS.2010.6156594
Lucas Alves Da Silva, W. Tatinian, G. Jacquemod
{"title":"BER and power consumption estimation based on hierarchical modeling of a 2.4 GHz power amplifier","authors":"Lucas Alves Da Silva, W. Tatinian, G. Jacquemod","doi":"10.1109/BMAS.2010.6156594","DOIUrl":"https://doi.org/10.1109/BMAS.2010.6156594","url":null,"abstract":"This paper presents a power consumption estimation methodology for wireless devices, consisting in hierarchical modeling of specific AMS-RF IP (Intellectual Properties). It provides accurate energy consumption models for specific devices, based on simulations and/or analytical expressions extraction. Thus, within a unified simulation environment, full system's characteristics such as BER (bit-error rate), PER (packet-error rate) and DC power consumption can be evaluated in terms of block specifications (in this case, the RF power amplifier). It can be seen that the platform provides realistic accuracy with minimal electrical information, while maintaining acceptable simulation times. Also, the co-simulation advantages and drawbacks of coupling these power consumption models with network analysis are discussed.","PeriodicalId":112947,"journal":{"name":"2010 IEEE International Behavioral Modeling and Simulation Workshop","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128739075","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
EMI modeling of a 32-bit microcontroller in Wait Mode 32位微控制器在等待模式下的电磁干扰建模
2010 IEEE International Behavioral Modeling and Simulation Workshop Pub Date : 2010-09-01 DOI: 10.1109/BMAS.2010.6156591
Jean-Pierre Leca, N. Froidevaux, H. Braquet, G. Jacquemod
{"title":"EMI modeling of a 32-bit microcontroller in Wait Mode","authors":"Jean-Pierre Leca, N. Froidevaux, H. Braquet, G. Jacquemod","doi":"10.1109/BMAS.2010.6156591","DOIUrl":"https://doi.org/10.1109/BMAS.2010.6156591","url":null,"abstract":"This paper presents a predictive model for the ElectroMagnetic Interferences (EMI) of a 32-bit microcontroller running in a WFI (Wait For Interrupt) mode. The simulated results correlate well to the TEM-Cell measurements. In the future, this model will be extended to be able to simulate the microcontroller in other modes (digital core running, Flash Memory reading or writing, etc.). The model has been simulated with the help of the ELDO simulator while the measurements have been done on a 32-bit STMicroelectronics microcontroller, so-called STXX, following the IEC 61967-2 standard. The aim of this work is to be able to predict, during the design stage, the level of electromagnetic emissions in order to establish some design or layout rules without needing to simulate the whole product.","PeriodicalId":112947,"journal":{"name":"2010 IEEE International Behavioral Modeling and Simulation Workshop","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116888198","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Fast dynamic simulation of VLSI circuits using reduced order compact macromodel of standard cells 基于标准单元的降阶紧凑宏模型的VLSI电路快速动态仿真
2010 IEEE International Behavioral Modeling and Simulation Workshop Pub Date : 2010-09-01 DOI: 10.1109/BMAS.2010.6156602
S. Priyadarshi, N. Kriplani, M. Steer, T. R. Harris
{"title":"Fast dynamic simulation of VLSI circuits using reduced order compact macromodel of standard cells","authors":"S. Priyadarshi, N. Kriplani, M. Steer, T. R. Harris","doi":"10.1109/BMAS.2010.6156602","DOIUrl":"https://doi.org/10.1109/BMAS.2010.6156602","url":null,"abstract":"This paper presents a dynamic simulation methodology using a reduced order compact macromodel of standard cells. The standard cell macromodels are formulated with a smaller number of state variables compared to an equivalent transistor-level implementation. This results in significant speed-ups over transistor-level simulation for large scale circuits. Such reduction in state variables also reduces memory usage. The macromodels are based on transistor equations, and simulation using these models produces results in excellent agreement (delay errors below 1%) with transistor-level simulation results. Various examples showing 1.5x−100x reduction in dynamic simulation time and 1.5x−2.8x reduction in memory usage are presented.","PeriodicalId":112947,"journal":{"name":"2010 IEEE International Behavioral Modeling and Simulation Workshop","volume":"115 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114209720","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Baseband fading channel simulator for Inter-Vehicle Communication using SystemC-AMS 基于SystemC-AMS的车间通信基带衰落信道模拟器
2010 IEEE International Behavioral Modeling and Simulation Workshop Pub Date : 2010-09-01 DOI: 10.1109/BMAS.2010.6156595
A. Massouri, A. Lévêque, L. Clavier, M. Vasilevski, A. Kaiser, M. Louërat
{"title":"Baseband fading channel simulator for Inter-Vehicle Communication using SystemC-AMS","authors":"A. Massouri, A. Lévêque, L. Clavier, M. Vasilevski, A. Kaiser, M. Louërat","doi":"10.1109/BMAS.2010.6156595","DOIUrl":"https://doi.org/10.1109/BMAS.2010.6156595","url":null,"abstract":"System level modeling and simulation have become a key issue in analyzing, optimizing and designing wireless systems. In this paper, modeling RF front end devices and radio propagation channel especially fading time-variant channel for Inter-Vehicle Communication using SystemC-AMS are investigated. Discrete baseband wireless channel model based on Tapped Delay Line model is presented. Time-variant Rayleigh and Rician fading are implemented in SystemC-AMS. The capabilities of SystemC-AMS are tested and compared to matlab for five vehicles scenario. With this framework, several criteria such as performance and optimal value of the system parameters of a WSN node can be evaluated and predicted before any hardware and software design.","PeriodicalId":112947,"journal":{"name":"2010 IEEE International Behavioral Modeling and Simulation Workshop","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114167285","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Modeling and simulation of a manycore PCR-CE lab-on-chip for DNA sequencing using SystemC/SystemC-AMS 利用SystemC/SystemC- ams对多核PCR-CE芯片实验室进行DNA测序建模和仿真
2010 IEEE International Behavioral Modeling and Simulation Workshop Pub Date : 2010-09-01 DOI: 10.1109/BMAS.2010.6156600
A. Habib, F. Pêcheux
{"title":"Modeling and simulation of a manycore PCR-CE lab-on-chip for DNA sequencing using SystemC/SystemC-AMS","authors":"A. Habib, F. Pêcheux","doi":"10.1109/BMAS.2010.6156600","DOIUrl":"https://doi.org/10.1109/BMAS.2010.6156600","url":null,"abstract":"The paper details the systemC/systemC-AMS model of a bio-compatible heterogeneous system, a lab-on-chip that encompasses several disciplines such as analog, digital, chemical kinetic reactions, optics and embedded software. The corresponding system virtual prototype takes as input an initial DNA concentration as well as the expression of the gene as a DNA string, and is able to compare the input string to a huge database of reference samples, and this detects mutation and pathologies. The model is composed of three parts: (1) DNA amplification by Polymerase Chain Reaction (PCR), (2) molecular separation by Capillary Electrophoresis (CE) and optical detection of fluorescently labeled molecules, (3) automated DNA sequencing on a digital manycore architecture running a highly multi-threaded software. The platform also digitally assists the two former analog parts which allows performance in complete autonomy. The simulated model can be used as a simulatable specification at a very high level of abstraction and can be seen as the first refinement step towards the design of a complex heterogeneous and bio-compatible system.","PeriodicalId":112947,"journal":{"name":"2010 IEEE International Behavioral Modeling and Simulation Workshop","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130845803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Battery lifetime modelling for a 2.45GHz cochlear implant application 2.45GHz人工耳蜗应用电池寿命建模
2010 IEEE International Behavioral Modeling and Simulation Workshop Pub Date : 2010-09-01 DOI: 10.1109/BMAS.2010.6156597
W. Tatinian, Yannick Vaiarello, G. Jacquemod
{"title":"Battery lifetime modelling for a 2.45GHz cochlear implant application","authors":"W. Tatinian, Yannick Vaiarello, G. Jacquemod","doi":"10.1109/BMAS.2010.6156597","DOIUrl":"https://doi.org/10.1109/BMAS.2010.6156597","url":null,"abstract":"This paper proposes a high level model for transmission losses between a miniaturized emitter and an implanted receiver for cochlear implant application. According to these losses, the required emitted power is computed and the battery lifetime of the emitter is estimated. The proposed study is based on wave propagation theory confronted with electromagnetic simulations. Electrical simulations are performed on the emission power amplifier which is the critical block in terms of power consumption.","PeriodicalId":112947,"journal":{"name":"2010 IEEE International Behavioral Modeling and Simulation Workshop","volume":"97 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116471741","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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