2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE)最新文献

Parallelizable Reachability Analysis Algorithms for Feed-Forward Neural Networks 前馈神经网络并行可达性分析算法

2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE) Pub Date : 2019-05-27 DOI: 10.1109/FormaliSE.2019.00012

Hoang-Dung Tran, Patrick Musau, Diego Manzanas Lopez, Xiaodong Yang, L. V. Nguyen, Weiming Xiang, Taylor T. Johnson

{"title":"Parallelizable Reachability Analysis Algorithms for Feed-Forward Neural Networks","authors":"Hoang-Dung Tran, Patrick Musau, Diego Manzanas Lopez, Xiaodong Yang, L. V. Nguyen, Weiming Xiang, Taylor T. Johnson","doi":"10.1109/FormaliSE.2019.00012","DOIUrl":"https://doi.org/10.1109/FormaliSE.2019.00012","url":null,"abstract":"Artificial neural networks (ANN) have displayed considerable utility in a wide range of applications such as image processing, character and pattern recognition, self-driving cars, evolutionary robotics, and non-linear system identification and control. While ANNs are able to carry out complicated tasks efficiently, they are susceptible to unpredictable and errant behavior due to irregularities that emanate from their complex non-linear structure. As a result, there have been reservations about incorporating them into safety-critical systems. In this paper, we present a reachability analysis method for feed-forward neural networks (FNN) that employ rectified linear units (ReLUs) as activation functions. The crux of our approach relies on three reachable-set computation algorithms, namely exact schemes, lazy-approximate schemes, and mixing schemes. The exact scheme computes an exact reachable set for FNN, while the lazy-approximate and mixing schemes generate an over-approximation of the exact reachable set. All schemes are designed efficiently to run on parallel platforms to reduce the computation time and enhance the scalability. Our methods are implemented in a toolbox called, NNV, and is evaluated using a set of benchmarks that consist of realistic neural networks with sizes that range from tens to a thousand neurons. Notably, NNV successfully computes and visualizes the exact reachable sets of the real world ACAS Xu deep neural networks (DNNs), which are a variant of a family of novel airborne collision detection systems known as the ACAS System X, using a representation of tens to hundreds of polyhedra.","PeriodicalId":111168,"journal":{"name":"2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115145743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 40

Static Analysis for Worst-Case Battery Utilization 最坏情况下电池利用率的静态分析

2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE) Pub Date : 2019-05-27 DOI: 10.1109/FormaliSE.2019.00009

D. Ivanov, S. Schupp

{"title":"Static Analysis for Worst-Case Battery Utilization","authors":"D. Ivanov, S. Schupp","doi":"10.1109/FormaliSE.2019.00009","DOIUrl":"https://doi.org/10.1109/FormaliSE.2019.00009","url":null,"abstract":"Lithium-ion batteries demonstrate two kinds of nonlinear behavior: rate capacity effects and recovery effects. These effects are dual to each other and show the dependency between the power consumption profile and battery utilization, i.e., the fraction of the battery charge that can be withdrawn.We propose a static analysis for computing the lower bound of battery utilization based on the Kinetic Battery Model (KiBaM), an analytical model capturing nonlinear battery behavior. Our method does not depend on the battery charge level and can be composed with other flow analyses and model checking techniques for improved accuracy. We propose a modification to the worklist algorithm for totally ordered semilattices with computable fixedpoints of transfer functions, which is necessary for computing our analysis. We prove the termination and correctness of our algorithm and introduce a nonforgetful extension to it for speeding up convergence. We implement the battery-utilization in the software verification tool CPAchecker by encoding the analysis together with our algorithm in a relaxed instance of a configurable program analysis (CPA). Our experiments show that the convergence speed up is sometimes achievable, but does not necessarily lead to a performance improvement.","PeriodicalId":111168,"journal":{"name":"2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121278211","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Clock Reduction in Timed Automata While Preserving Design Parameters 保持设计参数的定时自动机的时钟减少

2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE) Pub Date : 2019-05-27 DOI: 10.1109/FormaliSE.2019.00010

Beyazit Yalcinkaya, Ebru Aydin Gol

引用次数: 2

Epistemic Model Checking of Distributed Commit Protocols with Byzantine Faults 具有拜占庭错误的分布式提交协议的认知模型检验

2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE) Pub Date : 2019-05-27 DOI: 10.1109/FormaliSE.2019.00014

Omar I. Al-Bataineh, M. Reynolds

{"title":"Epistemic Model Checking of Distributed Commit Protocols with Byzantine Faults","authors":"Omar I. Al-Bataineh, M. Reynolds","doi":"10.1109/FormaliSE.2019.00014","DOIUrl":"https://doi.org/10.1109/FormaliSE.2019.00014","url":null,"abstract":"The notion of knowledge-based program introduced by Halpern and Fagin provides a useful formalism for designing, analyzing, and optimizing distributed systems. This paper formulates the two phase commit protocol as a knowledge-based program and then an iterative process of model checking and counter-example guided refinement is followed to find concrete implementations of the program for the case of perfect recall semantic in the Byzantine failures context with synchronous reliable communication. We model several different kinds of Byzantine failures and verify different strategies to fight and mitigate them. We address a number of questions that have not been considered in the prior literature, viz., under what circumstances a sender can know that its transmission has been successful, and under what circumstances an agent can know that the coordinator is cheating, and find concrete answers to these questions. The paper describes also a methodology based on temporal-epistemic model checking technology that can be followed to verify the shortest and longest execution time of a distributed protocol and the scenarios that lead to them.","PeriodicalId":111168,"journal":{"name":"2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123668511","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Verifying Channel Communication Correctness for a Multi-core Cooperatively Scheduled Runtime Using CSP 使用CSP验证多核协作调度运行时的信道通信正确性

2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE) Pub Date : 2019-05-27 DOI: 10.1109/FormaliSE.2019.00016

J. Pedersen, K. Chalmers

{"title":"Verifying Channel Communication Correctness for a Multi-core Cooperatively Scheduled Runtime Using CSP","authors":"J. Pedersen, K. Chalmers","doi":"10.1109/FormaliSE.2019.00016","DOIUrl":"https://doi.org/10.1109/FormaliSE.2019.00016","url":null,"abstract":"In this paper we use the process algebra CSP and the formal model-checker FDR to show that the implementation of one-to-one channel communication in the process-oriented language ProcessJ is correct. ProcessJ is a new process-oriented language with Java-like syntax and CSP-based communication using synchronous channels. ProcessJ allows for hundreds of millions of processes to be executed on a single processor core. ProcessJ generates Java code which eventually runs concurrently on the JVM using a cooperative scheduler. We use the translation from the ProcessJ code generator to translate ProcessJ to Java and further into CSP. We then utilize the FDR modelchecker to show that the generated Java code behaves like a generic synchronous, blocking, non-buffered one-to-one channel used previously to show correctness of channel communication in JCSP - a Java library that supports JVM thread-based concurrency. Finally, we highlight a lesson from verifying our behaviour using FDR - the ability to simplify our approach and show the implementation still meets our specification.","PeriodicalId":111168,"journal":{"name":"2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE)","volume":"39 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113957851","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Rigorous Design and Deployment of IoT Applications 严格设计和部署物联网应用

2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE) Pub Date : 2019-05-27 DOI: 10.1109/FormaliSE.2019.00011

A. Krishna, M. L. Pallec, Radu Mateescu, L. Noirie, Gwen Salaün

引用次数: 13

Modular Synthesis of Verified Verifiers of Computation with STV Algorithms STV算法计算验证器的模块化综合

2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE) Pub Date : 2019-05-27 DOI: 10.1109/FormaliSE.2019.00018

Milad K. Ghale, D. Pattinson, Michael Norrish

{"title":"Modular Synthesis of Verified Verifiers of Computation with STV Algorithms","authors":"Milad K. Ghale, D. Pattinson, Michael Norrish","doi":"10.1109/FormaliSE.2019.00018","DOIUrl":"https://doi.org/10.1109/FormaliSE.2019.00018","url":null,"abstract":"Single transferable vote (STV) is a family of preferential voting systems, different instances of which are used in binding elections throughout the world. We give a formal specification of this family, from which we derive fully verified tools that verify the computation for various instances of STV vote counting. These tools validate an execution of an STV vote counting algorithm, based on a transcript of the count. Our framework distils the similarities and differences of various instances of STV and gives a uniform and modular way of synthesising verifiers for its various instances, and provides the flexibility and ease for adapting and extending it to a variety of STV schemes. We minimise the trusted base in correctness of the tools produced by using the HOL4 and CakeML as the technical basis. We first formally specify and verify the tools in HOL4 and then obtain the machine executable versions for the tools by relying on the verified proof translator and the compiler of CakeML. Moreover, proofs that we establish in HOL4 and CakeML are almost completely automated so that new verified instances of STV can be created with no (or minimal) extra proof. Finally, our experimental results with executable code demonstrate feasibility of deploying the framework for verifying real size elections having an STV counting algorithm.","PeriodicalId":111168,"journal":{"name":"2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124763413","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

FASTEN: An Open Extensible Framework to Experiment with Formal Specification Approaches 一个开放的可扩展框架，用于实验正式规范方法

2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE) Pub Date : 2019-05-27 DOI: 10.1109/FormaliSE.2019.00013

D. Ratiu, M. Gario, Hannes Schoenhaar

{"title":"FASTEN: An Open Extensible Framework to Experiment with Formal Specification Approaches","authors":"D. Ratiu, M. Gario, Hannes Schoenhaar","doi":"10.1109/FormaliSE.2019.00013","DOIUrl":"https://doi.org/10.1109/FormaliSE.2019.00013","url":null,"abstract":"Formal specification approaches have been successfully used to specify and verify complex systems. Verification engineers so far either directly use formal specification languages which can be consumed by verification tools (e.g. SMV, Promela) or main stream modeling languages which are then translated into formal languages and verified (e.g. SysML, AADL). The first approach is expressive and effective but difficult to use by non-experts. The second approach lowers the entry barrier for novices but users are limited to the constructs of the chosen modeling languages and thereby end up abusing the language to encode behaviors of interest. In this paper, we introduce a third approach that we call FASTEN, in which modular and extensible Domain Specific Languages (DSLs) are used to raise the abstraction level of specification languages towards the domain of interest. The approach aims to help novice users to use formal specification, enable experts to use multi-paradigm modeling, and provide tools for the developers of verification technologies to easily experiment with various types of specification approaches. To show the feasibility of the approach, we release an open-source tool based on Jetbrains' MPS language workbench that provides an extensible stack of more than ten DSLs, situated at different levels of abstraction, built on top of the SMV language. We use the NuSMV model checker to perform verification, to simulate the models and lift the traces at the abstraction level of the DSLs. We detail on the experience with designing and developing the DSLs stack and briefly report on using the DSLs in practice for the study of a communication protocol of a safety critical system.","PeriodicalId":111168,"journal":{"name":"2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131534117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 8

A Vision for Helping Developers Use APIs by Leveraging Temporal Patterns 通过利用时态模式帮助开发人员使用api的愿景

2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE) Pub Date : 2019-05-27 DOI: 10.1109/FormaliSE.2019.00019

Erick Raelijohn, Michalis Famelis, H. Sahraoui

引用次数: 0

Towards Sampling and Simulation-Based Analysis of Featured Weighted Automata 基于采样和仿真的特征加权自动机分析

2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE) Pub Date : 2019-05-27 DOI: 10.1109/FormaliSE.2019.00015

Maxime Cordy, Axel Legay, Sami Lazreg, P. Collet

{"title":"Towards Sampling and Simulation-Based Analysis of Featured Weighted Automata","authors":"Maxime Cordy, Axel Legay, Sami Lazreg, P. Collet","doi":"10.1109/FormaliSE.2019.00015","DOIUrl":"https://doi.org/10.1109/FormaliSE.2019.00015","url":null,"abstract":"We consider the problem of model checking Variability-Intensive Systems (VIS) against non-functional requirements. These requirements are typically expressed as an optimization problem over quality attributes of interest, whose value is determined by the executions of the system. Identifying the optimal variant can be hard due to the state-explosion problem inherent to model checking the exponentially growing number of variants in large VIS. In this paper, we lay the foundations for the application of smart sampling and statistical model checking to solve this problem faster. We design a simple method that samples variants and executions in a uniform manner from a featured weighted automaton and that assesses which of the sampled variants/executions are optimal. We implemented our approach on top of ProVeLines, a tool suite for model-checking VIS and carried out a preliminary evaluation on an industrial embedded system design case study. Our results show that sampling-based approaches indeed holds the potential to improve scalability but should be supported by better heuristics to be competitive.","PeriodicalId":111168,"journal":{"name":"2019 IEEE/ACM 7th International Conference on Formal Methods in Software Engineering (FormaliSE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129671719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4