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[1993] Proceedings IEEE Workshop on FPGAs for Custom Computing Machines最新文献

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A stochastic neural architecture that exploits dynamically reconfigurable FPGAs 利用动态可重构fpga的随机神经结构
[1993] Proceedings IEEE Workshop on FPGAs for Custom Computing Machines Pub Date : 1993-04-05 DOI: 10.1109/FPGA.1993.279462
M. V. Daalen, P. Jeavons, J. Shawe-Taylor
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引用次数: 69
Spyder: a reconfigurable VLIW processor using FPGAs Spyder:一个使用fpga的可重构VLIW处理器
[1993] Proceedings IEEE Workshop on FPGAs for Custom Computing Machines Pub Date : 1993-04-05 DOI: 10.1109/FPGA.1993.279483
C. Iseli, E. Sanchez
{"title":"Spyder: a reconfigurable VLIW processor using FPGAs","authors":"C. Iseli, E. Sanchez","doi":"10.1109/FPGA.1993.279483","DOIUrl":"https://doi.org/10.1109/FPGA.1993.279483","url":null,"abstract":"A processor with multiple reconfigurable execution units has been designed and implemented. The reconfigurable execution units are implemented using reprogrammable field programmable gate array (FPGA) chips. The architecture and implementation of this processor are described in detail. An example shows that this reconfigurable processor is able to compute the new state of 100'000'000 cells of Conway's game of life per second with a clock speed of 6.25 MHz.<<ETX>>","PeriodicalId":104383,"journal":{"name":"[1993] Proceedings IEEE Workshop on FPGAs for Custom Computing Machines","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-04-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131102564","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 83
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