{"title":"Timing analysis of superscalar processor programs using ACSR","authors":"Jin-Young Choi, Insup Lee, Inhye Kang","doi":"10.1109/RTOSS.1994.292559","DOIUrl":"https://doi.org/10.1109/RTOSS.1994.292559","url":null,"abstract":"This paper illustrates a formal technique for describing the timing properties and resource constraints of pipelined superscalar processor instructions at high level. Superscalar processors can issue and execute multiple instructions simultaneously. The degree of parallelism depends on the multiplicity of hardware functional units as well as data dependencies among instructions. Thus, the timing properties of a superscalar program is difficult. To analyze and predict. We describe how to model the instruction-level architecture of a superscalar processor using ACSR and how to derive the temporal behavior of an assembly program using the ACSR laws. The salient aspect of ACSR is that the notions of time, resources and priorities are supported directly in the algebra. Our approach is to model superscalar processor registers as ACSR resources, instructions as ACSR processes, and use ACSR priorities to achieve maximum possible instruction-level parallelism.<<ETX>>","PeriodicalId":103713,"journal":{"name":"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123244214","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A linear-time online task assignment scheme for multiprocessor systems","authors":"A. Burchard, Y. Oh, J. Liebeherr, S. Son","doi":"10.1109/RTOSS.1994.292566","DOIUrl":"https://doi.org/10.1109/RTOSS.1994.292566","url":null,"abstract":"A new online task assignment scheme is presented for multiprocessor systems where individual processors execute the rate-monotonic scheduling algorithm. The computational complexity of the task assignment scheme grows linearly with the number of tasks, and its performance is shown to be significantly better than previously existing schemes. The superiority of the assignment scheme is achieved by a new schedulability condition derived for the rate-monotonic scheduling discipline.<<ETX>>","PeriodicalId":103713,"journal":{"name":"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132373983","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
N. Audsley, Robert I. Davis, A. Burns, A. Wellings
{"title":"Appropriate mechanisms for the support of optional processing in hard real-time systems","authors":"N. Audsley, Robert I. Davis, A. Burns, A. Wellings","doi":"10.1109/RTOSS.1994.292567","DOIUrl":"https://doi.org/10.1109/RTOSS.1994.292567","url":null,"abstract":"It has been recognised that future hard real-time systems need to be more flexible than current scheduling theory permits. One method of increasing flexibility is the incorporation, at run-time, of optional components into processes with hard deadlines. Such components are not guaranteed offline, but may be guaranteed at run-time if sufficient resources are available. This is achieved by providing mechanisms within the kernel for run-time monitoring of spare processor capacity and its subsequent assignment to requesting processes. This paper examines these mechanisms within the context of fixed priority preemptive scheduling.<<ETX>>","PeriodicalId":103713,"journal":{"name":"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131320456","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wei Zhao, Amit Kumar, Gopal Agrawal, S. Kamat, Nicholas Malcolm, Biao Chen
{"title":"Real-time communication in FDDI-based reconfigurable networks","authors":"Wei Zhao, Amit Kumar, Gopal Agrawal, S. Kamat, Nicholas Malcolm, Biao Chen","doi":"10.1109/RTOSS.1994.292562","DOIUrl":"https://doi.org/10.1109/RTOSS.1994.292562","url":null,"abstract":"We report our ongoing research in real-time communication with FDDI-based reconfigurable networks. The original FDDI architecture was enhanced in order to improve its fault-tolerance capability while a scheduling methodology, including message assignment, bandwidth allocation, and bandwidth management is developed to support real-time communication. As a result, message deadlines are guaranteed even in the event of network faults.<<ETX>>","PeriodicalId":103713,"journal":{"name":"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123191348","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Task scheduling for real-time multi-processor simulations","authors":"G. Borriello, D. Miles","doi":"10.1109/RTOSS.1994.292558","DOIUrl":"https://doi.org/10.1109/RTOSS.1994.292558","url":null,"abstract":"Scheduling of tasks onto multi-processors is an increasingly important problem in the simulation of avionics systems. The problem is difficult due to the many hard real-time constraints imposed on the schedule in the form of processor frame-time limits and latency requirements. In this paper, we present a solution to this real-time scheduling problem using simulated annealing techniques. The running time of the algorithm is fast enough for it to be applied in the rapid reconfiguration of simulation test benches in use at Boeing Flight Systems Laboratory. Its efficacy is demonstrated using an example with 60 tasks communicating through 1800 common blocks and scheduled onto 6 processors under 4 latency constraints which achieved a utilization factor over 95%. Such an example can be scheduled in approximately 35 minutes of CPU time on an HP-Apollo 425 workstation.<<ETX>>","PeriodicalId":103713,"journal":{"name":"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software","volume":"176 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124740655","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Successful use of rate monotonic theory on a formidable real time system","authors":"L. Doyle, J. Elzey","doi":"10.1109/RTOSS.1994.292557","DOIUrl":"https://doi.org/10.1109/RTOSS.1994.292557","url":null,"abstract":"The navigation payload software for the next block of Global Positioning System satellites recently completed testing. The computer program for the onboard computer is sufficiently complex to expose almost every issue that has been put forward in rate monotonic theory. The success of this effort demonstrates the utility of the theory in this type of application. The system designed required the processor to perform a highly diverse set of hard deadline real-time functions. This design would have been difficult or impossible prior to the development of rate monotonic theory. The use of utilization bounds has important advantages from a software engineering point of view. The problems of insuring schedulability over the course of development and verifying the schedulability of the finished system are discussed.<<ETX>>","PeriodicalId":103713,"journal":{"name":"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121971838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Using SDL in embedded systems design: a tool for generating real-time OS pSOS based embedded systems applications software","authors":"Yeu-Yiu Huang, M. Hughes","doi":"10.1109/RTOSS.1994.292564","DOIUrl":"https://doi.org/10.1109/RTOSS.1994.292564","url":null,"abstract":"We present an efficient method using the Specification and Description Language (SDL) for designing and implementing real-lime embedded systems. We also discuss the implementation of a companion kernel for an SDL based Design Tool (SDT) CASE tool environment to generate real-time OS based pSOS multitasking application software by applying defined mapping translation rules. Since SDL is a formal specification and description language, with the CASE environment SDT support, the major part of a system can be analyzed, simulated, verified, and validated at early stages during system development. The concurrency due to the multiple concurrent state machines in a system is preserved in target run-time environment. Because the SDL described system uses message-passing, a distributed version can be relatively easy to derive from. To emphasize the proposed method using SDL without dramatically compromising the memory and response time (speed), we show the results obtained from pSOS implementation of an AccessControl system. We also outline some areas that we are continuing to work on.<<ETX>>","PeriodicalId":103713,"journal":{"name":"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software","volume":"77 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126088698","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"An argument for a runtime layer SPARTA design","authors":"R. Wisniewski, C. Brown","doi":"10.1109/RTOSS.1994.292554","DOIUrl":"https://doi.org/10.1109/RTOSS.1994.292554","url":null,"abstract":"Researchers have used advances in hardware technology to design larger and more complex real-time applications. Larger applications require new integration techniques while more complex applications require a restructuring of the underlying system support. We examine the system design issues of supporting SPARTAs (Soft Parallel Real-Time Applications). There exists a gap between hard real-time kernel mechanisms and the functionality desired by a SPARTA programmer. Thus, an integral part of supporting SPARTA design will be providing an intermediate runtime layer. We describe our experiences building Ephor, including what motivated its conception and development, and the resulting separation of responsibilities both easing SPARTA design and improving their performance.<<ETX>>","PeriodicalId":103713,"journal":{"name":"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115837047","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"User-level real-time threads","authors":"S. Oikawa, H. Tokuda","doi":"10.1109/RTOSS.1994.292570","DOIUrl":"https://doi.org/10.1109/RTOSS.1994.292570","url":null,"abstract":"Continuous-media applications require more efficient and flexible support from real-time threads than traditional real-time systems. It includes functionalities such as the dynamic management of thread attributes and the support of multiple thread models. We describe the design and implementation of user-level real-time threads on the RT-Mach micro kernel. Since they are implemented at user-level, both of the fast management of thread attributes and the support of multiple thread models are possible.<<ETX>>","PeriodicalId":103713,"journal":{"name":"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128429677","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Practical formal development of real-time systems","authors":"S. Bradley, W. Henderson, D. Kendall, A. Robson","doi":"10.1109/RTOSS.1994.292563","DOIUrl":"https://doi.org/10.1109/RTOSS.1994.292563","url":null,"abstract":"The complexities of real-time systems are such that it is often thought necessary to give a formal justification of their correctness especially if they are to be used in a safety-critical environment. We describe our work on a formally based design method for real-time systems which allows the timing aspects of a concurrent system to be mathematically described and verified, as well as semi-automatically implemented. Our design language, AORTA, is a timed process algebra, with features to ensure that all designs can be implemented. A predictable real-time kernel is also described, which is used in the construction of a system from an AORTA design, and which allows the timing of the implementation to be verified.<<ETX>>","PeriodicalId":103713,"journal":{"name":"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125410923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}