{"title":"实时系统的实际正式开发","authors":"S. Bradley, W. Henderson, D. Kendall, A. Robson","doi":"10.1109/RTOSS.1994.292563","DOIUrl":null,"url":null,"abstract":"The complexities of real-time systems are such that it is often thought necessary to give a formal justification of their correctness especially if they are to be used in a safety-critical environment. We describe our work on a formally based design method for real-time systems which allows the timing aspects of a concurrent system to be mathematically described and verified, as well as semi-automatically implemented. Our design language, AORTA, is a timed process algebra, with features to ensure that all designs can be implemented. A predictable real-time kernel is also described, which is used in the construction of a system from an AORTA design, and which allows the timing of the implementation to be verified.<<ETX>>","PeriodicalId":103713,"journal":{"name":"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Practical formal development of real-time systems\",\"authors\":\"S. Bradley, W. Henderson, D. Kendall, A. Robson\",\"doi\":\"10.1109/RTOSS.1994.292563\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The complexities of real-time systems are such that it is often thought necessary to give a formal justification of their correctness especially if they are to be used in a safety-critical environment. We describe our work on a formally based design method for real-time systems which allows the timing aspects of a concurrent system to be mathematically described and verified, as well as semi-automatically implemented. Our design language, AORTA, is a timed process algebra, with features to ensure that all designs can be implemented. A predictable real-time kernel is also described, which is used in the construction of a system from an AORTA design, and which allows the timing of the implementation to be verified.<<ETX>>\",\"PeriodicalId\":103713,\"journal\":{\"name\":\"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-05-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RTOSS.1994.292563\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 11th IEEE Workshop on Real-Time Operating Systems and Software","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RTOSS.1994.292563","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The complexities of real-time systems are such that it is often thought necessary to give a formal justification of their correctness especially if they are to be used in a safety-critical environment. We describe our work on a formally based design method for real-time systems which allows the timing aspects of a concurrent system to be mathematically described and verified, as well as semi-automatically implemented. Our design language, AORTA, is a timed process algebra, with features to ensure that all designs can be implemented. A predictable real-time kernel is also described, which is used in the construction of a system from an AORTA design, and which allows the timing of the implementation to be verified.<>