{"title":"Internal chip ESD phenomena beyond the protection circuit","authors":"C. Duvvury, R. Rountree, O. Adams","doi":"10.1109/RELPHY.1988.23419","DOIUrl":"https://doi.org/10.1109/RELPHY.1988.23419","url":null,"abstract":"V/sub DD/-V/sub SS/ protection design considerations to meet MIL-STD requirements are discussed. Internal chip electrostatic-discharge (ESD) damage due to direct stress applied between V/sub DD/ and V/sub SS/ pins is illustrated, and possible solutions are discussed. It is shown that induced current paths can exist when outputs/inputs are stressed with respect to V/sub DD/ or V/sub SS/ stress, and if the internal layout is not carefully considered, the overall protection level can degrade. An unusual internal ESD phenomenon that was observed for I/O pins stressed with respect to V/sub DD/ is reported. The results show that there exists a window of threshold voltages where the I/O protection is not effective due to interaction with the internal chip layout.<<ETX>>","PeriodicalId":102187,"journal":{"name":"26th Annual Proceedings Reliability Physics Symposium 1988","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116506127","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
W. Anderson, A. Christou, F. Buot, J. Archer, G. Bechtel, H. Cooke, Y. Pao, M. Simons, E. Chase
{"title":"Reliability of discrete MODFETs: life testing, radiation effects, and ESD","authors":"W. Anderson, A. Christou, F. Buot, J. Archer, G. Bechtel, H. Cooke, Y. Pao, M. Simons, E. Chase","doi":"10.1109/RELPHY.1988.23433","DOIUrl":"https://doi.org/10.1109/RELPHY.1988.23433","url":null,"abstract":"Experimental and theoretical results of a reliability study of GaAs/AlGaAs MODFETs are presented and show a commonality of degradation modes under various accelerated stress conditions. The reliability of submicron-gate low-noise MODFETs was evaluated using high-temperature storage and DC operating life tests; significantly greater drain current degradation that occurred under DC bias is related to a field-assisted channel doping mechanism. Under pulsed electron irradiation long-term drain current transients were observed as well as persistent photoconductivity in some devices. Electrostatic-discharge experiments revealed that, unlike standard FETs, human body model (HBM) stressing of MODFETs results in loss of drain current, indicating deconfinement of the two-dimensional electron gas. The unified model of MODFET degradation is therefore related to field-assisted migration of alloy constituents and doping species.<<ETX>>","PeriodicalId":102187,"journal":{"name":"26th Annual Proceedings Reliability Physics Symposium 1988","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122043768","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High reliable Al-Si alloy/Si contacts by rapid thermal sintering","authors":"E. Umemura, H. Onoda, S. Madokoro","doi":"10.1109/RELPHY.1988.23455","DOIUrl":"https://doi.org/10.1109/RELPHY.1988.23455","url":null,"abstract":"Rapid thermal annealing technology has been applied to the sintering process for Al-Si alloy. Contact resistance was kept low by this technique, and low contact resistance was maintained even after postsintering heat treatment. The relationship between contact resistance and the number of Si nodules has been investigated. Si nodules and the Si at contact holes are considered to be precipitation nuclei for dissolved Si in Al-Si alloy. Precipitating Si is shared by Si nodules and contact holes after heat treatment. This model explains contact resistance change during heat treatments.<<ETX>>","PeriodicalId":102187,"journal":{"name":"26th Annual Proceedings Reliability Physics Symposium 1988","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132337752","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The dependence of hot carrier degradation on AC stress waveforms","authors":"K. Cham, H. Fu, Y. Nishi","doi":"10.1109/RELPHY.1988.23421","DOIUrl":"https://doi.org/10.1109/RELPHY.1988.23421","url":null,"abstract":"The hot carrier degradation of submicron n-channel FETs is characterized for various gate and drain pulse waveforms. The results are consistent with interface electron traps generated by hot holes. The results showed that inverters with small loads can degrade faster than inverters with large loads, due to AC degradation effects. Device lifetime in circuits cannot in general be projected by DC data. The AC effect was also found to be dependent on device structure.<<ETX>>","PeriodicalId":102187,"journal":{"name":"26th Annual Proceedings Reliability Physics Symposium 1988","volume":"68 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125378924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Investigation of the EBIC/TCM-method and application to VLSI-structures","authors":"A. Dallmann, D. Bollmann, G. Menzel","doi":"10.1109/RELPHY.1988.23437","DOIUrl":"https://doi.org/10.1109/RELPHY.1988.23437","url":null,"abstract":"The EBIC/TCM (electron beam induced current/tunneling current microscopy) method was applied to gate oxide structures. Oxide defects could be localized exactly for further analyses by scanning or transmission electron microscopy. Passivated structures and trench capacitors were investigated. Semiautomatic measurements were carried out in order to obtain statistical results. In the case of degraded gate oxide before destructive breakdown, TCM was used. The best results were achieved in the depletion range. A lateral solution of about 200 nm and a step-resolution of 2 nm were attained. To avoid further radiation damage by the electron beam, laser-activated TCM was used. Both methods yielded comparable results.<<ETX>>","PeriodicalId":102187,"journal":{"name":"26th Annual Proceedings Reliability Physics Symposium 1988","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128827728","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Investigation of instability in multi-layer dielectric structures","authors":"S. Murakami, T. Kagami, Y. Sugawara","doi":"10.1109/RELPHY.1988.23441","DOIUrl":"https://doi.org/10.1109/RELPHY.1988.23441","url":null,"abstract":"Stability of secondary passivation layers as RF plasma sputtered SiO/sub 2/ (Sp-SiO/sub 2/), P-SiO/sub 2/, and P-SiN in high-voltage integrated circuits under bias-temperature (BT) stress aging was investigated by using an MIS diode and a lateral pnpn thyristor. It was shown that the initial electrical properties were almost the same for each passivation layer system. However, variations in net number of charges by +or-BT stress aging were observed owing to different charge storage mechanisms, such as residual charges, interface trapped charges, and polarized charges. These instabilities are discussed in conjunction with variations in the device blocking characteristics.<<ETX>>","PeriodicalId":102187,"journal":{"name":"26th Annual Proceedings Reliability Physics Symposium 1988","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-04-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133177171","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Chatterjee, S. Aur, T. Niuya, P. Yang, J. Seitchik
{"title":"Failure in CMOS circuits induced by hot carriers in multi-gate transistors","authors":"A. Chatterjee, S. Aur, T. Niuya, P. Yang, J. Seitchik","doi":"10.1109/RELPHY.1988.23420","DOIUrl":"https://doi.org/10.1109/RELPHY.1988.23420","url":null,"abstract":"The problem of vertical isolation in circuits fabricated using shallow n-well epitaxial CMOS technology is considered. Unexpectedly high substrate current resulting in circuit failure has been observed during accelerated reliability tests. The substrate current is a result of enhanced hole injection from multigate p-channel transistors with interdigitated source and drain. The electron current generated from impact ionization near the drain forward-biases the source junctions causing hole injection to the substrate. The current is sensitive to the supply voltage and temperature. Consequently, unanticipated failures can occur at the high voltages and temperatures encountered during burn-in. Design and process solutions are discussed.<<ETX>>","PeriodicalId":102187,"journal":{"name":"26th Annual Proceedings Reliability Physics Symposium 1988","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115809578","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High reliable Al-Si alloy/Si contacts by rapid thermal sintering","authors":"E. Uemura, H. Onoda, S. Madokoro","doi":"10.1109/RELPHY.1988.917817","DOIUrl":"https://doi.org/10.1109/RELPHY.1988.917817","url":null,"abstract":"As device size reduces, the Si in A1-Si alloy In conclusion, rapid thermal annealing technology causes serious problems on reliability. One of them is has been applied for sintering process. Low contact contact resistance increase due to Si precipitation at resistance has been maintained even afcer postcontact holes. It is difficult to solve this problem sintering heat treatments. A d e l t'mt explains chis by conventional furnace annealing process and a new effect with nmber of Si nodules was proposed. It is annealing technology is desired. Rapid thermal clarified that RTS is an effective technique for annealing technology has been applied for sintering metallization process. process (Rapid Thermal Sintering : RTS) and high reliable contact characteristics has been obtained. Contact resistance measurement samples were prepared using conventional VLSI fabrication processes. Surface carrier concentration for n+ Si and pt Si were 3~1O~~cm-3 and 2x1OZ0 cm-! respectively. Al-lYSi was used for metallization material. Contact resistance for lw@ contacts was measured by Kelvin's pattern. Samples for Si nodule observation were prepared as follows. BPSG film ( 3 O h ) was deposited on 6-inch Si(100) wafers. Al-lYSi ( 7 O O m ) was deposited by mgnetron sputtering method. After heat treatments, Si was delineated by phosphorus acid and Si nodules were observed by scanning electron microscope. In both evaluation, heat treatments were carried out by furnace or rapid thermal annealing equipnent. Furthemre, additional annealing considering post-sintering heat treatments were performed by furnace. Contact resistance of furnace-sintered (FS) samples increases with post-sintering heat treatment. On the other hand, RTS samples has no increase on contact resistance. In order to analyze this result, relationship between contact resistance and the nmber of Si nodules has been investigated. The nmber of Si nodules can be controlled easily by RTS. Si nodules formed by RTS is larger in nmber than those f o m d by FS. Si nodules formed by FS and WS has a drastic difference in nmber. Its tendency is kept even after post anneal. This phenomenon can be explained by the theory of classical homogeneous nucleation considering heat treatment time. Contact resistance is kept low in the region where the nmber of Si nodules is large. While, as the nmber of Si nodules decreases, contact resistance increases drastically. In order to explain this result, we propose a d e l here. The Si contained in A1-Si alloy continues dissolving and precipitating during heat treatments. The dissolved Si in A1-Si' precipitates to nuclei after heat treatment. Si nodules and the Si at contact holes are considered to be nuclei for precipitating Si. After all, the dissolved Si are shared by these nuclei. When the number of Si nodules existed around a contact hole is large, the amount of Si precipitated at the contact hole is small and the contact resistance is kept small. On the other hand, contact resis","PeriodicalId":102187,"journal":{"name":"26th Annual Proceedings Reliability Physics Symposium 1988","volume":"6 3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129194731","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}