Advances in Electrical and Electronic Engineering最新文献_第7页

Early Area and Power Estimation Model for Rapid System Level Design and Design Space Exploration 用于快速系统级设计和设计空间探索的早期面积和功率估计模型

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Advances in Electrical and Electronic Engineering Pub Date : 2022-04-01 DOI: 10.15598/aeee.v20i1.4229

Abhishek N. Tripathi, Arvind Rajawat

引用次数: 0

Impact of Work Function Tunability on Thermal and RF Performance of P-type Window based Junctionless Transistor 功函数可调性对p型窗型无结晶体管热和射频性能的影响

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Advances in Electrical and Electronic Engineering Pub Date : 2022-04-01 DOI: 10.15598/aeee.v20i1.4258

Priyansh Tripathi, N. Yadava, M. Gupta, R. Chauhan

{"title":"Impact of Work Function Tunability on Thermal and RF Performance of P-type Window based Junctionless Transistor","authors":"Priyansh Tripathi, N. Yadava, M. Gupta, R. Chauhan","doi":"10.15598/aeee.v20i1.4258","DOIUrl":"https://doi.org/10.15598/aeee.v20i1.4258","url":null,"abstract":". The choice of gate metal technology for junctionless transistors needs to have diverse characteristics as metals have distinct work functions and hence, they show incompatibility while tailoring threshold of the device. In such a scenario, bimetallic stacked gate can be a promising candidate to present wide range of tunable work functions required for nano-regime junctionless transistors. This paper explores the electronic phenomena occurring at metal-metal interface and the impact of Platinum (Pt)/Titanium (Ti) bimetallic stacked gate-based work function tunability on the RF and thermal performances of p-type window-based Silicon on Insulator Junctionless Transistor (SOI JLT) using numerical simulator SILVACO ATLAS. The parameters considered for performance evaluation are ON-state current ( I ON ), OFF-state current ( I OFF ), I ON / I OFF ratio, transconductance ( g m ), cutoff frequency ( f T ), Transconductance Frequency Product (TFP), Intrinsic Gate Delay (IGD), intrinsic gain ( A V ), and Global Device Temperature (GDT). The g m , f T , TFP, A V and GDT improve for modified over conventional in the ON state at higher work function, while IGD improves at lower work function. The improvements of 11.7 % and 2.21 % are obtained in maximum g m and f T , respectively, for modified transistor over conventional. The findings suggest that bimetallic stacked gate modified SOIJLT is a better op-tion than conventional for low-power RF application.","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2022-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47233678","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

ESD Stress Analysis and Suppression in a Single-Junction Thermal Converter 单结热变换器ESD应力分析与抑制

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Advances in Electrical and Electronic Engineering Pub Date : 2022-04-01 DOI: 10.15598/aeee.v20i1.4115

T. E. Kgakatsi, E. Golovins, Johan Venter

{"title":"ESD Stress Analysis and Suppression in a Single-Junction Thermal Converter","authors":"T. E. Kgakatsi, E. Golovins, Johan Venter","doi":"10.15598/aeee.v20i1.4115","DOIUrl":"https://doi.org/10.15598/aeee.v20i1.4115","url":null,"abstract":". This article presents an outline of Electric Transient Disturbances (ETDs), represented by the ElectroStatic Discharge (ESD) in accordance with the Human-Body Model (HBM), on the AC-DC transfer measurement standard, represented by the Single-Junction Thermal Converter (SJTC) Thermal Element (TE). Mitigation technique against the power dissipation build-up, higher than the operational margins recommended by a manufacturer, on the TE were proposed and modelled using Laplace Transform (LT) analysis. A mathematical model and an optimization algorithm were developed to determine the equivalent circuit model parameters of a Transient Overload Protection Module (TOPM) that would offer adequate protection against destructive power dissipation levels build-up on the TE. The mathematical model was developed using an 8 kV ESD, which was expected to deliver short-circuit current with a peak value of approx-imately 5 . 33 A through a load impedance of approxi-mately 1 m Ω . The ESD stress signal was injected into the TOPM connected in parallel with the TE. The active power dissipated by the SJTC TE per period of transient response was calculated from the current and voltage obtained from the mathematical analysis, and the results indicate a power dissipation of 10 mW by the TE. From the algorithm, the model parameter that noticeably influences the power dissipation capabilities of the TOPM is the inductance and it must be smaller than 1 . 2 nH. A CAD based simulation model was developed and analysed. The simulation results agreed with the mathematical model.","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2022-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43035990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Photo-induced Electron Emission of Nanostructured Carbon Thin Film Based Transmission Photocathodes at Different Electric Field 不同电场下纳米结构碳薄膜基透射光电阴极的光致电子发射

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Advances in Electrical and Electronic Engineering Pub Date : 2022-04-01 DOI: 10.15598/aeee.v20i1.4138

J. Huran, V. Sasinková, M. Nozdrin, E. Kováčová, A. Kobzev, A. Kleinová

引用次数: 0

A simple Encoding Scheme to Achieve the Capacity of Half-Duplex Relay Channel 一种实现半双工中继信道容量的简单编码方案

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Advances in Electrical and Electronic Engineering Pub Date : 2022-04-01 DOI: 10.15598/aeee.v20i1.4347

Z. Al-qudah, Khalid A. Darabkh

{"title":"A simple Encoding Scheme to Achieve the Capacity of Half-Duplex Relay Channel","authors":"Z. Al-qudah, Khalid A. Darabkh","doi":"10.15598/aeee.v20i1.4347","DOIUrl":"https://doi.org/10.15598/aeee.v20i1.4347","url":null,"abstract":". In this paper, the Half-Duplex Relay Channel (HDRC) is thoroughly investigated. Even though this channel model is widely studied, the capacity is not yet fully understood and particularly has not been tightly expressed. In this work, a new capacity expression of the discrete memoryless HDRC is explic-itly established. In particular, a new expression of the achievable rate is derived by taking advantage of the well-known capacity results of both the degraded broadcast channel and the multiple access channel. Specifically, in order to obtain the achievable rate, the transmission from the source to destination is operated over two phases. In the first phase, the broadcast phase, the source broadcasts to both relay and destination. In the second phase, both source and relay transmit to destination to form multiple access channel. Then, we prove that the new achievable rate meets the cut-set outer bound such that the capacity of the discrete memoryless HDRC is attained. Next, the new derived capacity result is extended to the case of additive Gaussian channel. Further, the attained capacity is ana-lytically and then numerically shown to encompass all well-known available findings in the literature. Addi-tional numerical examples are also shown to present the cases in which the relay is beneficial and how the achievable capacity varies with the source-relay and relay-destination channel gains.","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2022-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42821180","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Positioning the Adjacent Buried Objects Using UWB Technology Combine with Levenberg Marquardt Algorithm UWB技术与Levenberg-Marquardt算法相结合定位相邻埋物

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Advances in Electrical and Electronic Engineering Pub Date : 2022-04-01 DOI: 10.15598/aeee.v20i1.4355

Nguyen Thi Huyen, Duong Duc Ha, H. Pham

引用次数: 2

Concept of the InGaAs Plasmonic Waveguide for Quantum Cascade Laser Applications 用于量子级联激光器的InGaAs等离子体波导的概念

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Advances in Electrical and Electronic Engineering Pub Date : 2021-12-30 DOI: 10.15598/aeee.v19i4.4099

Adriana Lozinska, M. Badura, B. Ściana

引用次数: 0

Intelligent Bearing Fault Diagnosis Method Based on HNR Envelope and Classification Using Supervised Machine Learning Algorithms 基于HNR包络和有监督机器学习算法分类的轴承故障智能诊断方法

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Advances in Electrical and Electronic Engineering Pub Date : 2021-12-30 DOI: 10.15598/aeee.v19i4.4183

I. Ouachtouk, Soumia El Hani, K. Dahi

{"title":"Intelligent Bearing Fault Diagnosis Method Based on HNR Envelope and Classification Using Supervised Machine Learning Algorithms","authors":"I. Ouachtouk, Soumia El Hani, K. Dahi","doi":"10.15598/aeee.v19i4.4183","DOIUrl":"https://doi.org/10.15598/aeee.v19i4.4183","url":null,"abstract":"Research on data-driven bearing fault diagnosis techniques has recently drawn more and more attention due to the availability of massive condition monitoring data. The research work presented in this paper aims to develop an architecture for the detection and diagnosis of bearing faults in the induction machines. The developed data-oriented architecture uses vibration signals collected by sensors placed on the machine, which is based, in the first place, on the extraction of fault indicators based on the harmonics-to-noise ratio envelope. Normalisation is then applied to the extracted indicators to create a well-processed data set. The evolution of these indicators will be studied afterwards according to the type and severity of defects using sequential backward selection technique. Supervised machine learning classification methods are developed to classify the measurements described by the feature vector with respect to the known modes of operation. In the last phase concerning decision making, ten classifiers are tested and applied based on the selected and combined indicators. The developed classification methods allow classifying the observations, with respect to the different modes of bearing condition (outer race, inner race fault or healthy condition). The proposed method is validated on data collected using an experimental bearing test bench. The experimental results indicate that the proposed architecture achieves high accuracy in bearing fault detection under all operational conditions. The results show that, compared to some proposed approaches, our proposed architecture can achieve better performance overall in terms of the number of optimal features and the accuracy of the tests.","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2021-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45820183","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Optimized Gains for the Control of Islanded Solar Photovoltaic and Wind System 孤岛式太阳能光伏和风力系统控制的优化增益

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Advances in Electrical and Electronic Engineering Pub Date : 2021-12-30 DOI: 10.15598/aeee.v19i4.4227

Sravya Kedari, Rajagopal Veramalla, Amritha Kodakkal

{"title":"Optimized Gains for the Control of Islanded Solar Photovoltaic and Wind System","authors":"Sravya Kedari, Rajagopal Veramalla, Amritha Kodakkal","doi":"10.15598/aeee.v19i4.4227","DOIUrl":"https://doi.org/10.15598/aeee.v19i4.4227","url":null,"abstract":"This paper deals with a system that consists of a combination of wind and solar sources. The wind energy unit is the primary energy source that feeds the load and is controlled by the I cos Φ algorithm. The algorithm’s efficiency is tested under normal operation and when one of the phases in the load is disconnected. This algorithm efficiently maintains the voltage and frequency during these conditions. The solar unit is directly connected with the battery energy storage system and is used to charge the battery. It implements MPPT using Perturb and Observe (P&O) method. The hybrid system is simulated in MATLAB/SIMULINK. It is found to perform and maintain the frequency and the potential at the load side and the point of common coupling under normal operation and varying load conditions. I cos Φ algorithm, which controls the switching signals, requires simple calculations for generating reference source currents. This algorithm does not need conversion from one frame to another, making the system respond for quick dynamics and improved power quality. The perturb and observe method is proven to ensure the maximum power extraction from the solar panel. Thus, the combination of these two techniques makes the system act efficiently and handle load disturbances.","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2021-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"41610853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Development of a Device for On-Die Double-Pulse Testing and Measurement of Dynamic On-Resistance of GaN HEMTs GaN HEMT动态导通电阻片上双脉冲测试装置的研制

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Advances in Electrical and Electronic Engineering Pub Date : 2021-12-30 DOI: 10.15598/aeee.v19i4.4136

J. Kozarik, J. Marek, A. Chvála, M. Minárik, K. Gasparek, M. Jagelka

{"title":"Development of a Device for On-Die Double-Pulse Testing and Measurement of Dynamic On-Resistance of GaN HEMTs","authors":"J. Kozarik, J. Marek, A. Chvála, M. Minárik, K. Gasparek, M. Jagelka","doi":"10.15598/aeee.v19i4.4136","DOIUrl":"https://doi.org/10.15598/aeee.v19i4.4136","url":null,"abstract":"On-die testing can accelerate development of semiconductor devices, but poses certain challenges related to high frequency and high current switching. This paper describes design and development of a tester for double-pulse switching test and measurement of dynamic on-state resistance of unpackaged High-ElectronMobility Transistors (GaN HEMTs). The tester is capable of switching an inductive load at drain-to-source voltage up to 400 V and drain current up to 10 A. Design challenges resulting from specific properties of GaN HEMTs and on-die measurement are explained, and solutions are proposed. Essential parts of the developed device are described, including low inductance gate-driver and measurement methods. Modified drain voltage clamping circuit for accurate on-state drain voltage measurement is described. The tester is constructed as a printed circuit board, integrated into a probe station. Voltage and current waveforms are measured with oscilloscope and used to calculate the on-resistance. Results of a reference measurement with commercially available packaged transistors are presented. Waveforms measured on experimental unpackaged normally-off GaN HEMT samples are also presented and discussed. The proposed tester device proved to be capable of performing the dynamic on-resistance measurement with satisfactory results.","PeriodicalId":7268,"journal":{"name":"Advances in Electrical and Electronic Engineering","volume":" ","pages":""},"PeriodicalIF":0.6,"publicationDate":"2021-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42543320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1