2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP)最新文献

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An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures 特定应用程序数据流体系结构的定量分析方法

2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP) Pub Date : 1997-07-14 DOI: 10.1109/ASAP.1997.606839

B. Kienhuis, E. Deprettere, K. Vissers, P. V. D. Wolf

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引用次数: 296

Parallel processing architectures for rank order and stack filters 等级顺序和堆栈过滤器的并行处理架构

2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP) Pub Date : 1993-10-25 DOI: 10.1109/ASAP.1993.397121

L. Lucke, K. Parhi

{"title":"Parallel processing architectures for rank order and stack filters","authors":"L. Lucke, K. Parhi","doi":"10.1109/ASAP.1993.397121","DOIUrl":"https://doi.org/10.1109/ASAP.1993.397121","url":null,"abstract":"To achieve additional speedup in rank order and stack filter architectures requires the use of parallel processing techniques such as pipelining and block processing. Pipelining is well understood but few block architectures have been developed for rank order and stack filtering. Block processing is essential when the architecture reaches the throughput limits caused by the underlying technology. A trivial block structure repeats a single input, single output structure to generate a multiple input, multiple output structure and can achieve speedups equal to the block size (or the number of multiple outputs). Unlike linear filters, the rank order and stack filter outputs are calculated using comparisons. It is possible to share these comparisons within the block structure. The authors introduce a systematic method for applying block processing to the rank order and stack filters. This method takes advantage of shared comparisons within the block structure to generate a block filter with shared substructures whose complexity is reduced. Furthermore, block processing is important for the generation of low power designs. Trivial block structures generate low power designs up to a certain limit. The authors demonstrate how block structures with shared substructures are used to generate designs with arbitrarily low power. >","PeriodicalId":6642,"journal":{"name":"2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP)","volume":"8 1","pages":"65-76"},"PeriodicalIF":0.0,"publicationDate":"1993-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87025626","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Recursive algorithms for AR spectral estimation and their array realizations AR频谱估计的递归算法及其阵列实现

2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP) Pub Date : 1990-01-01 DOI: 10.1109/ASAP.1990.145449

Chi-Min Liu, C. Jen

引用次数: 0

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