Journal of Electrical Engineering最新文献

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Experimental comparison of operational amplifier and voltage sensor-based zero-crossing detector circuits for power electronic converters 基于运算放大器和电压传感器的电力电子转换器过零检测器电路的实验比较
Journal of Electrical Engineering Pub Date : 2023-12-01 DOI: 10.2478/jee-2023-0056
Osamah Al-Dori, A. Vural
{"title":"Experimental comparison of operational amplifier and voltage sensor-based zero-crossing detector circuits for power electronic converters","authors":"Osamah Al-Dori, A. Vural","doi":"10.2478/jee-2023-0056","DOIUrl":"https://doi.org/10.2478/jee-2023-0056","url":null,"abstract":"Abstract Zero-crossing detection (ZCD) circuits are widely utilized to synchronize power electronics converters with the grid and measure frequency and phase angle. They are usually designed using an operational amplifier (op-amp) or a voltage sensor accompanied by a processing device. The performance profile of these circuits alters depending on many factors, including the input voltage level. An experimental comparison between the two ZCD circuits across various input voltage levels does not appear to be presented in the literature. This work experimentally compares the performance of an op-amp and an isolated voltage sensor-based ZCD circuits, considering their rise/fall latency and precision in detecting the zero-crossing points (ZCPs). The design process and the experimental results demonstrated that the op-amp-based ZCD circuit is susceptible to false and multiple detections of ZCPs and is best suited for relatively low-voltage applications. On the other hand, the voltage sensor-based ZCD circuit allows signal conditioning and is best suited for relatively high voltage applications.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":"35 6","pages":"485 - 491"},"PeriodicalIF":0.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139192481","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Enhancing optical fiber performance through liquid infiltration in photonic crystal fiber 通过光子晶体光纤中的液体渗透提高光纤性能
Journal of Electrical Engineering Pub Date : 2023-12-01 DOI: 10.2478/jee-2023-0051
M. Debbal, Mohammed Chamse eddine Ouadah, M. Bouregaa, H. Chikh-Bled
{"title":"Enhancing optical fiber performance through liquid infiltration in photonic crystal fiber","authors":"M. Debbal, Mohammed Chamse eddine Ouadah, M. Bouregaa, H. Chikh-Bled","doi":"10.2478/jee-2023-0051","DOIUrl":"https://doi.org/10.2478/jee-2023-0051","url":null,"abstract":"Abstract Liquid infiltration into photonic crystal fibers (PCFs) opens new horizons in optical fiber design. This innovation allows precise control of the refractive index, dispersion, and nonlinear effects within the PCF core, expanding its adaptability for various applications. Through numerical simulations, we explore the impact of different liquids on chromatic dispersion in PCFs, emphasizing the role of filling ratios. Our findings unveil shifts in zero dispersion wavelengths, with chloroform causing significant changes. Lower filling ratios reduce dispersion sensitivity, while higher ratios enable dispersion compensation. This study advances our understanding of liquid-filled PCFs, vital for cutting-edge photonics research and practical applications.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":"60 51","pages":"434 - 441"},"PeriodicalIF":0.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139194863","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Implementing and evaluating a new Silent Rank Attack in RPL-Contiki based IoT networks 在基于 RPL-Contiki 的物联网网络中实施并评估新的静默等级攻击
Journal of Electrical Engineering Pub Date : 2023-12-01 DOI: 10.2478/jee-2023-0053
M. Rouissat, M. Belkheir, H. S. A. Belkhira, A. Mokaddem, Djamila Ziani
{"title":"Implementing and evaluating a new Silent Rank Attack in RPL-Contiki based IoT networks","authors":"M. Rouissat, M. Belkheir, H. S. A. Belkhira, A. Mokaddem, Djamila Ziani","doi":"10.2478/jee-2023-0053","DOIUrl":"https://doi.org/10.2478/jee-2023-0053","url":null,"abstract":"Abstract IoT networks are witnessing a rapid growth in various domains of our daily life, offering more attractive features in terms of measurement accuracy, easy implementation and affordable deployment costs. This outstanding boom is not undoubtedly far away from different challenging issues that impede the network efficiency and quality. The security concern remains one among the prominent issues that affect both the edge and the core IoT network where risks increase in conjunction with the network expansion. RPL is the well-known routing protocol for the edge part of the IoT network, intended to meet the requirements of the constrained IoT devices. Despite its various advantages, RPL remains suffering from various security attacks targeting the topology, the traffic, and the nodes resources. Our work presents a new silent decreased rank attack against RPL-Contiki, as well as a lightweight countermeasure. The obtained results on a random studied topology show that almost half the existing nodes in the topology were attracted by the planted malicious node, through its falsified low rank. Moreover, an increase of 12.5% in the control overhead and an increase of 15% in the total consumed energy are recorded compared to the attack-free topology. On the other hand, the attack did not heavily affect the PDR, but the latency showed an increase of 45% compared to the attack free case. This damaging effect makes this modified rank attack a serious threat to IoT RPL based networks.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":" 28","pages":"454 - 462"},"PeriodicalIF":0.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139196234","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Electrical performance estimation and comparative study of heterojunction strained and conventional gate all around nanosheet field effect transistors 异质结应变和传统栅极纳米片场效应晶体管的电气性能评估和比较研究
Journal of Electrical Engineering Pub Date : 2023-12-01 DOI: 10.2478/jee-2023-0058
Reza Abbasnezhad, H. R. Saghai, Reza Hosseini, Aliasghar Sedghi, Ali Vahedi
{"title":"Electrical performance estimation and comparative study of heterojunction strained and conventional gate all around nanosheet field effect transistors","authors":"Reza Abbasnezhad, H. R. Saghai, Reza Hosseini, Aliasghar Sedghi, Ali Vahedi","doi":"10.2478/jee-2023-0058","DOIUrl":"https://doi.org/10.2478/jee-2023-0058","url":null,"abstract":"Abstract In this paper, we propose a novel type of Gate All Around Nanosheet Field Effect Transistor (GAA NS FET) that incorporates source heterojunctions and strained channels and substrate. We compare its electrical characteristics with those of the Heterojunction Gate All Around Nanosheet Field Effect Transistor (Heterojunction GAA NS FET) and the Conventional Gate All Around Nanosheet Field Effect Transistor (Conventional GAA NS FET). We investigate the impact of electrostatic control on both DC and analog parameters such as gate capacitance (Cgg), transconductance gm, and cut-off frequency (fT) for all three device types. In our Proposed GAA NS FET, we employ Germanium for the source and substrate regions, Silicon/Germanium/Silicon (Si/Ge/Si) for the channel, and Silicon for the drain region. The introduction of strain into the nanosheet and the use of a heterojunction structure significantly enhance device performance. Before utilizing a model to analyze a semiconductor device, it is crucial to accurately determine and elaborate on the model parameters. In this case, we solve the Density Gradient (DG) equation self-consistently to obtain the electrostatic potential for a given electron Fermi-level distribution, use the Shockley-Read-Hall (SRH) equation to estimate carrier generation, account for bandgap narrowing in transport behavior, and consider auger recombination. Our general results indicate a notable improvement in drain current, transconductance, and unity-gain frequency by approximately 42%, 53%, and 31%, respectively. This enhancement results in superior RF performance for the Proposed GAA NS FET compared to both the heterojunction GAA NS FET and the conventional GAA NS FET.","PeriodicalId":508697,"journal":{"name":"Journal of Electrical Engineering","volume":"21 4","pages":"503 - 512"},"PeriodicalIF":0.0,"publicationDate":"2023-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139190279","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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