Formal Aspects of Computing最新文献_第7页

Compositional Analysis of Probabilistic Timed Graph Transformation Systems 概率定时图变换系统的组成分析

IF 1 4区计算机科学

Formal Aspects of Computing Pub Date : 2022-11-30 DOI: https://dl.acm.org/doi/10.1145/3572782

Maria Maximova, Sven Schneider, Holger Giese

{"title":"Compositional Analysis of Probabilistic Timed Graph Transformation Systems","authors":"Maria Maximova, Sven Schneider, Holger Giese","doi":"https://dl.acm.org/doi/10.1145/3572782","DOIUrl":"https://doi.org/https://dl.acm.org/doi/10.1145/3572782","url":null,"abstract":"The analysis of behavioral models is of high importance for cyber-physical systems, as the systems often encompass complex behavior based on e.g. concurrent components with mutual exclusion or probabilistic failures on demand. The rule-based formalism of Probabilistic Timed Graph Transformation Systems (PTGTSs) is a suitable choice when the models representing states of the system can be understood as graphs and timed and probabilistic behavior is important. However, model checking PTGTSs is limited to systems with rather small state spaces. We present an approach for the analysis of large-scale systems modeled as PTGTSs by systematically decomposing their state spaces into manageable fragments. To obtain qualitative and quantitative analysis results for a large-scale system, we verify that results obtained for its fragments serve as overapproximations for the corresponding results of the large-scale system. Hence, our approach allows for the detection of violations of qualitative and quantitative safety properties for the large-scale system under analysis. We consider a running example in which shuttles drive on tracks of a large-scale topology and autonomously coordinate their local behavior with other shuttles nearby. For this running example, we verify that (a) shuttles can always make the expected forward progress using several properties, (b) shuttles never collide, and (c) shuttles are unlikely to execute emergency brakes in two scenarios. In our evaluation, we apply an implementation of our approach in the tool AutoGraph to our running example.","PeriodicalId":50432,"journal":{"name":"Formal Aspects of Computing","volume":"24 1","pages":""},"PeriodicalIF":1.0,"publicationDate":"2022-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138517760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

A Debugging Game for Probabilistic Models 一个概率模型调试游戏

IF 1 4区计算机科学

Formal Aspects of Computing Pub Date : 2022-09-20 DOI: https://dl.acm.org/doi/10.1145/3536429

Hichem Debbi

{"title":"A Debugging Game for Probabilistic Models","authors":"Hichem Debbi","doi":"https://dl.acm.org/doi/10.1145/3536429","DOIUrl":"https://doi.org/https://dl.acm.org/doi/10.1145/3536429","url":null,"abstract":"One of the major advantages of model checking over other formal methods is its ability to generate a counterexample when a model does not satisfy is its specification. A counterexample is an error trace that helps to locate the source of the error. Therefore, the counterexample represents a valuable tool for debugging. In Probabilistic Model Checking (PMC), the task of counterexample generation has a quantitative aspect. Unlike the previous methods proposed for conventional model checking that generate the counterexample as a single path ending with a bad state representing the failure, the task in PMC is completely different. A counterexample in PMC is a set of evidences or diagnostic paths that satisfy a path formula, whose probability mass violates the probability threshold. Counterexample generation is not sufficient for finding the exact source of the error. Therefore, in conventional model checking, many debugging techniques have been proposed to act on the counterexamples generated to locate the source of the error. In PMC, debugging counterexamples is more challenging, since the probabilistic counterexample consists of multiple paths and it is probabilistic. In this article, we propose a debugging technique based on stochastic games to analyze probabilistic counterexamples generated for probabilistic models described as Markov chains in PRISM language. The technique is based mainly on the idea of considering the modules composing the system as players of a reachability game, whose actions contribute to the evolution of the game. Through many case studies, we will show that our technique is very effective for systems employing multiple components. The results are also validated by introducing a debugging tool called GEPCX (Game Explainer of Probabilistic Counterexamples).","PeriodicalId":50432,"journal":{"name":"Formal Aspects of Computing","volume":"72 1","pages":""},"PeriodicalIF":1.0,"publicationDate":"2022-09-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138517773","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Fast Automated Abstract Machine Repair Using Simultaneous Modifications and Refactoring 使用同步修改和重构的快速自动化抽象机器维修

IF 1 4区计算机科学

Formal Aspects of Computing Pub Date : 2022-09-20 DOI: https://dl.acm.org/doi/10.1145/3536430

Cheng-Hao Cai, Jing Sun, Gillian Dobbie, Zhé Hóu, Hadrien Bride, Jin Song Dong, Scott Uk-Jin Lee

引用次数: 0

Probabilistic Bigraphs 概率Bigraphs

IF 1 4区计算机科学

Formal Aspects of Computing Pub Date : 2022-09-19 DOI: https://dl.acm.org/doi/10.1145/3545180

Blair Archibald, Muffy Calder, Michele Sevegnani

引用次数: 0

Formal Verification of Transcendental Fixed- and Floating-point Algorithms using an Automatic Theorem Prover 用自动定理证明器形式化验证超越定点和浮点算法

IF 1 4区计算机科学

Formal Aspects of Computing Pub Date : 2022-09-19 DOI: https://dl.acm.org/doi/10.1145/3543670

Samuel Coward, Lawrence Paulson, Theo Drane, Emiliano Morini

引用次数: 0

A Refinement-based Formal Development of Cyber-physical Railway Signalling Systems 基于精化的铁路网络物理信号系统形式化开发

IF 1 4区计算机科学

Formal Aspects of Computing Pub Date : 2022-08-27 DOI: 10.1145/3524052

Y. Aït-Ameur, Sergiy Bogomolov, G. Dupont, A. Iliasov, A. Romanovsky, P. Stankaitis

{"title":"A Refinement-based Formal Development of Cyber-physical Railway Signalling Systems","authors":"Y. Aït-Ameur, Sergiy Bogomolov, G. Dupont, A. Iliasov, A. Romanovsky, P. Stankaitis","doi":"10.1145/3524052","DOIUrl":"https://doi.org/10.1145/3524052","url":null,"abstract":"For years, formal methods have been successfully applied in the railway domain to formally demonstrate safety of railway systems. Despite that, little has been done in the field of formal methods to address the cyber-physical nature of modern railway signalling systems. In this article, we present an approach for a formal development of cyber-physical railway signalling systems that is based on a refinement-based modelling and proof-based verification. Our approach utilises the Event-B formal specification language together with a hybrid system and communication modelling patterns to developing a generic hybrid railway signalling system model that can be further refined to capture a specific railway signalling system. The main technical contribution of this article is the refinement of the hybrid train Event-B model with other railway signalling sub-systems. The complete model of the cyber-physical railway signalling system was formally proved to ensure a safe rolling stock separation and prevent their derailment. Furthermore, the article demonstrates the advantage of the refinement-based development approach of cyber-physical systems, which enables a problem decomposition and in turn reduction in the verification and modelling effort.","PeriodicalId":50432,"journal":{"name":"Formal Aspects of Computing","volume":"35 1","pages":"1 - 1"},"PeriodicalIF":1.0,"publicationDate":"2022-08-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45878598","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Algebra-Based Reasoning for Loop Synthesis 基于代数的环路综合推理

IF 1 4区计算机科学

Formal Aspects of Computing Pub Date : 2022-07-21 DOI: https://dl.acm.org/doi/10.1145/3527458

Andreas Humenberger, Daneshvar Amrollahi, Nikolaj Bjørner, Laura Kovács

{"title":"Algebra-Based Reasoning for Loop Synthesis","authors":"Andreas Humenberger, Daneshvar Amrollahi, Nikolaj Bjørner, Laura Kovács","doi":"https://dl.acm.org/doi/10.1145/3527458","DOIUrl":"https://doi.org/https://dl.acm.org/doi/10.1145/3527458","url":null,"abstract":"Provably correct software is one of the key challenges of our software-driven society. Program synthesis—the task of constructing a program satisfying a given specification—is one strategy for achieving this. The result of this task is then a program that is correct by design. As in the domain of program verification, handling loops is one of the main ingredients to a successful synthesis procedure.We present an algorithm for synthesizing loops satisfying a given polynomial loop invariant. The class of loops we are considering can be modeled by a system of algebraic recurrence equations with constant coefficients, thus encoding program loops with affine operations among program variables. We turn the task of loop synthesis into a polynomial constraint problem by precisely characterizing the set of all loops satisfying the given invariant. We prove soundness of our approach, as well as its completeness with respect to an a priori fixed upper bound on the number of program variables. Our work has applications toward synthesizing loops satisfying a given polynomial loop invariant—program verification—as well as generating number sequences from algebraic relations. To understand viability of the methodology and heuristics for synthesizing loops, we implement and evaluate the method using the <monospace>Absynth</monospace> tool.","PeriodicalId":50432,"journal":{"name":"Formal Aspects of Computing","volume":"21 1","pages":""},"PeriodicalIF":1.0,"publicationDate":"2022-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138517802","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Compositional Verification of Railway Interlocking Systems 铁路联锁系统的组成验证

IF 1 4区计算机科学

Formal Aspects of Computing Pub Date : 2022-07-21 DOI: 10.1145/3549736

A. Haxthausen, A. Fantechi

{"title":"Compositional Verification of Railway Interlocking Systems","authors":"A. Haxthausen, A. Fantechi","doi":"10.1145/3549736","DOIUrl":"https://doi.org/10.1145/3549736","url":null,"abstract":"Model checking techniques have often been applied to the verification of railway interlocking systems, responsible for guiding trains safely through a given railway network. However, these techniques fail to scale to the interlocking systems controlling large stations, composed of hundreds and even thousands of controlled entities, due to the state space explosion problem. Indeed, interlocking systems exhibit a certain degree of locality that allows some reasoning only on the mere set of entities that regard the train movements, but safe routing through a complex station layout requires a global reservation policy, which can require global state conditions to be taken into account. In this article, we present a compositional approach aimed at chopping the verification of a large interlocking system into that of smaller fragments, exploiting in each fragment a proper abstraction of the global information on routing state. A proof is given of the thesis that verifying the safety of the smaller fragments is sufficient to verify the safety of the whole network. Experiments using this compositional approach have shown important gains in performance of the verification, as well as in the size of affordable station layouts.","PeriodicalId":50432,"journal":{"name":"Formal Aspects of Computing","volume":"35 1","pages":"1 - 46"},"PeriodicalIF":1.0,"publicationDate":"2022-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43917506","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

A Survey of Practical Formal Methods for Security 安全实用形式化方法综述

IF 1 4区计算机科学

Formal Aspects of Computing Pub Date : 2022-07-05 DOI: https://dl.acm.org/doi/full/10.1145/3522582

Tomas Kulik, Brijesh Dongol, Peter Gorm Larsen, Hugo Daniel Macedo, Steve Schneider, Peter W. V. Tran-Jørgensen, James Woodcock

{"title":"A Survey of Practical Formal Methods for Security","authors":"Tomas Kulik, Brijesh Dongol, Peter Gorm Larsen, Hugo Daniel Macedo, Steve Schneider, Peter W. V. Tran-Jørgensen, James Woodcock","doi":"https://dl.acm.org/doi/full/10.1145/3522582","DOIUrl":"https://doi.org/https://dl.acm.org/doi/full/10.1145/3522582","url":null,"abstract":"In today’s world, critical infrastructure is often controlled by computing systems. This introduces new risks for cyber attacks, which can compromise the security and disrupt the functionality of these systems. It is therefore necessary to build such systems with strong guarantees of resiliency against cyber attacks. One way to achieve this level of assurance is using formal verification, which provides proofs of system compliance with desired cyber security properties. The use of Formal Methods (FM) in aspects of cyber security and safety-critical systems are reviewed in this article. We split FM into the three main classes: theorem proving, model checking, and lightweight FM. To allow the different uses of FM to be compared, we define a common set of terms. We further develop categories based on the type of computing system FM are applied in. Solutions in each class and category are presented, discussed, compared, and summarised. We describe historical highlights and developments and present a state-of-the-art review in the area of FM in cyber security. This review is presented from the point of view of FM practitioners and researchers, commenting on the trends in each of the classes and categories. This is achieved by considering all types of FM, several types of security and safety-critical systems, and by structuring the taxonomy accordingly. The article hence provides a comprehensive overview of FM and techniques available to system designers of security-critical systems, simplifying the process of choosing the right tool for the task. The article concludes by summarising the discussion of the review, focusing on best practices, challenges, general future trends, and directions of research within this field.","PeriodicalId":50432,"journal":{"name":"Formal Aspects of Computing","volume":"49 1","pages":""},"PeriodicalIF":1.0,"publicationDate":"2022-07-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138517761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Verification of Crashsafe Caching in a Virtual File System Switch 虚拟文件系统交换机的crash - safe缓存验证

IF 1 4区计算机科学

Formal Aspects of Computing Pub Date : 2022-07-05 DOI: https://dl.acm.org/doi/full/10.1145/3523737

Stefan Bodenmüller, Gerhard Schellhorn, Wolfgang Reif

引用次数: 0