IETE Journal of Education最新文献

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Alernative Designs of an Active RC Realization of the Fourth Order Lowpass Butterworth Filter 四阶低通巴特沃斯滤波器有源RC实现的备选设计
IETE Journal of Education Pub Date : 2023-10-19 DOI: 10.1080/09747338.2023.2267514
S. C. Dutta Roy
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引用次数: 0
Experimental Observation of Chaotic Attractors from the FPGA implementation of 3D Chaotic Systems 三维混沌系统FPGA实现中混沌吸引子的实验观察
IETE Journal of Education Pub Date : 2023-10-12 DOI: 10.1080/09747338.2023.2267515
José David Rodríguez-Muñoz, Jonathan Daniel Tavizón-Aldama, Esteban Tlelo-Cuautle
{"title":"Experimental Observation of Chaotic Attractors from the FPGA implementation of 3D Chaotic Systems","authors":"José David Rodríguez-Muñoz, Jonathan Daniel Tavizón-Aldama, Esteban Tlelo-Cuautle","doi":"10.1080/09747338.2023.2267515","DOIUrl":"https://doi.org/10.1080/09747338.2023.2267515","url":null,"abstract":"AbstractIn recent years, researchers have designed and implemented chaotic oscillators using digital hardware elements to develop applications like secure communications and random number generation. Due to its programmability and low-cost characteristics, one of the most used digital devices to synthesize chaotic systems is the field-programmable gate array (FPGA), which is recommended for fast prototyping. In this manner, this paper shows the experimental observation of seven chaotic attractors that are simulated using the Verilog hardware description language, and implemented in an FPGA. The seven designs are Lorenz-type systems, which are designed from the discretization of their equations using the well-known Forward Euler method. The block description of the seven chaotic systems employs the fixed-point numerical format using 32 bit. The simulations of the chaotic systems using Matlab and Active-HDL software, along with the block diagrams of the designs, are presented. The final part of the work illustrates the experimental attractors on a Teledyne Lecroy oscilloscope, obtained by using an FPGA Cyclone II EP2C35F672C6 and a 16-bit digital-to-analog converter.KEYWORDS: Chaotic oscillatorChaosOne-step methodFPGAFixed-point format AcknowledgementsJ.D. Rodríguez-Muñoz thanks to CONAHCYT at México for the scholarship for pursuing a Master Degree at INAOE. J.D. Tavizón-Aldama thanks to Programa Delfín at México for the scholarship to pursue an internship at INAOE during the summer of 2023.Disclosure statementNo potential conflict of interest was reported by the author(s).Additional informationNotes on contributorsJosé David Rodríguez-MuñozJosé David Rodríguez-Muñoz received the BSc degree in electronics engineering from the Tecnológico de Nuevo Laredo, Mexico, in 2021. He is currently pursuing an MSc degree in electronics with the Instituto Nacional de Astrofísica, Óptica y Electrónica (INAOE), Mexico. His research interests include chaotic systems, digital signal processing, and digital systems design with FPGA. Email: david.rodriguez@inaoe.mxJonathan Daniel Tavizón-AldamaJonathan Daniel Tavizón-Aldama is currently pursuing the BSc degree in electronics and communications engineering with the Centro Universitario de Ciencias Exactas e Ingeniería (CUCEI), Universidad de Guadalajara, Mexico. His research interest includes chaotic systems, embedded software, and digital signal processing. Email: jonathan.tavizon0028@alumnos.udg.mxEsteban Tlelo-CuautleEsteban Tlelo-Cuautle received the BSc degree from Instituto Tecnológico de Puebla, Mexico, in 1993, and the MSc and PhD degrees from Instituto Nacional de Astrofísica, Óptica y Electrónica (INAOE), Mexico, in 1995 and 2000, respectively. In 2001, he was appointed as a Professor-Researcher at INAOE. He has authored five books, edited 13 books, and around 300 works published in book chapters, inter- national journals, and conferences. His research interests include analog signal processing, synthesis an","PeriodicalId":470300,"journal":{"name":"IETE Journal of Education","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136013729","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Active RC Realization of a First-Order All-Pass Filter with a Difference Amplifier 带差分放大器的一阶全通滤波器有源RC实现
IETE Journal of Education Pub Date : 2023-10-11 DOI: 10.1080/09747338.2023.2266422
S. C. Dutta Roy
{"title":"Active RC Realization of a First-Order All-Pass Filter with a Difference Amplifier","authors":"S. C. Dutta Roy","doi":"10.1080/09747338.2023.2266422","DOIUrl":"https://doi.org/10.1080/09747338.2023.2266422","url":null,"abstract":"AbstractIn this tutorial article, we present an active RC realization of a first-order all-pass filter using a difference amplifier. It has the desirable feature of equal resistors, which eases its fabrication, particularly in the IC form. A detailed analysis is followed by design considerations.KEYWORDS: First-order circuitRC active all-pass filter ACKNOWLEDGEMENTSThe author thanks Sumantra Dutta Roy for his help in the preparation of this manuscript.Disclosure statementNo potential conflict of interest was reported by the author(s).Additional informationNotes on contributorsS. C. Dutta RoyS C Dutta Roy was educated at the Calcutta University. He worked with the Kalyani University in India, and the University of Minnesota in the USA, before joining IIT Delhi. During his tenure there, he visited the Leeds University in the UK and the Iowa State University, Ames, Iowa, in the USA, as a visiting professor. After serving the IIT Delhi for four decades in various capacities, including a deanship, he is now completely retired. However, he continues research and still publishes papers in professional journals of repute. He has been honoured by fellowships, including IEEE fellowship, a distinguished fellowship of the IETE, two honorary doctorates, and all major national awards, including the highest one, viz. Shanti Swarup Bhatnagar Prize of the Govt. of India, and the Distinguished Teacher Award of the IEEE Signal Processing Society. He is the author of five full-time video courses, now available freely in the YouTube, numerous research papers, four patents, and two books. Corresponding author. Email: s.c.dutta.roy@gmail.com","PeriodicalId":470300,"journal":{"name":"IETE Journal of Education","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"136212705","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Review of Filtering with Two Resistances and Two Capacitances 双电阻双电容滤波研究进展
IETE Journal of Education Pub Date : 2023-10-05 DOI: 10.1080/09747338.2023.2260782
S. C. Dutta Roy
{"title":"A Review of Filtering with Two Resistances and Two Capacitances","authors":"S. C. Dutta Roy","doi":"10.1080/09747338.2023.2260782","DOIUrl":"https://doi.org/10.1080/09747338.2023.2260782","url":null,"abstract":"AbstractThis is a tutorial article, presenting the various types of filtering that one can perform with only two resistors and two capacitors. It is shown that all types of filters – lowpass, highpass, bandpass, bandstop and allpass – can be obtained with these components. In the process, we review some of the recent papers by this author and bring out their important features, and discuss some new aspects. The article also contains a simple result of transfer function equivalence of two different configurations, which does not appear to have been noticed earlier in the literature.KEYWORDS: RC networkfiltersover-unity gainequivalencesingle resistance control AcknowledgmentsThe author thanks the reviewer for his constructive comments and suggestions. Thanks are also due to Y. V. Joshi, Sumantra Dutta Roy and Soham Dutta Roy for their help in preparing this manuscript.Disclosure statementNo potential conflict of interest was reported by the author(s).Additional informationFundingNo funding was available for this work.Notes on contributorsS. C. Dutta RoyS C Dutta Roy was educated at the Calcutta University. He worked with the Kalyani University in India, and the University of Minnesota in the USA, before joining IIT Delhi. During his tenure there, he visited the Leeds University in the UK and the Iowa State University, Ames, Iowa, in the USA, as visiting professor. After serving the IIT Delhi for four decades in various capacities, including a deanship, he is now completely retired. However, he continues his research and still publishes papers in professional journals of repute. He has been honoured by Fellowships, including IEEE Fellowship, a Distinguished Fellowship of the IETE, two Honorary Doctorates, and all major national awards, including the highest one, viz. Shanti Swarup Bhatnagar Prize of the Govt. of India, and the Distinguished Teacher Award of the IEEE Signal Processing Society. He is the author of five full-time video courses, now available freely in the YouTube, numerous research papers, four patents, and two books. Corresponding author. E-mail: s.c.dutta.roy@gmail.com","PeriodicalId":470300,"journal":{"name":"IETE Journal of Education","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135484078","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
On Six-Element Bridged-T RC Bandstop and Bandpass Networks 六元桥式t - RC带阻带通网络研究
IETE Journal of Education Pub Date : 2023-09-18 DOI: 10.1080/09747338.2023.2258492
S. C. Dutta Roy, Y. V. Joshi
{"title":"On Six-Element Bridged-T RC Bandstop and Bandpass Networks","authors":"S. C. Dutta Roy, Y. V. Joshi","doi":"10.1080/09747338.2023.2258492","DOIUrl":"https://doi.org/10.1080/09747338.2023.2258492","url":null,"abstract":"AbstractThis paper is concerned with a six-element bridged-T RC network, which is a bandstop filter, but by reorientation, can also achieve bandpass characteristics. The general configuration is analyzed for its transfer function and then two special cases are considered. Interestingly, the bandstop configuration in one case and the bandpass configuration in both cases show over-unity gain in a small range of frequencies.KEYWORDS: Bandpassbandstopbridged ladder RC networkover unity gain Disclosure statementNo potential conflict of interest was reported by the author(s).Additional informationNotes on contributorsS. C. Dutta RoyS C Dutta Roy studied at Calcutta University, and worked with Kalyani University in India, and the University of Minnesota in the USA, before joining IIT Delhi. During his tenure there, he visited Leeds University in the UK and Iowa State University, Ames, Iowa, in the USA, as a visiting professor. After serving the IIT Delhi for four decades in various capacities, including a deanship, he is now retired. However, he continues his research and still publishes papers in professional repute journals. He has been honoured by Fellowships of all National Academies in Science and Engineering, of the IEEE a Distinguished Fellowship of the IETE, two Honorary Doctorates, and all major national awards, including the highest one, viz. Shanti Swarup Bhatnagar Prize of the Govt. of India, and the Distinguished Teacher Award of the IEEE Signal Processing Society. He is the author of five full-time video courses, now available freely on YouTube, numerous research papers, four patents, and two books. Corresponding author. Email: s.c.dutta.roy@gmail.com; s.c.dutta.roy@gmail.comY. V. JoshiY V Joshi studied at the department of electronics and telecommunication engineering, SGGS Institute of Engineering, Nanded, obtaining his B. E. Degree in 1986 and the M. E. degree in 1991. He joined this Institute as a lecturer in 1986 and was promoted to as an assistant professor in 1993, and Professorship in 2001. In between, he obtained his Ph.D. degree from IIT Delhi in 1998 in digital signal processing. Prof. Joshi also worked at the SGGS Institute in various capacities such as Head of the Department (2002–2004), Dean (Academics) (2004–2006), Dean (Resource Mobilization) (2007–2008), Registrar (2014–2016), and Director (2018–2023). On leaving from the Institute, he also worked as the Director, Walchand College of Engineering, Sangli (2009 to 2013). He teaches courses on Signals and systems, Digital Signal Processing, Modern Digital Design using Verilog, Communication systems, Data Structures, and Network Theory at both UG and PG Levels. He supervises students for M. Tech. and Ph. D. in signal processing and allied areas. He has also conducted several short-duration Faculty development programs at the Institute. He has published 35 International Journal Papers and more than 50 National and International Conference papers. He visited the USA (2016), Duba","PeriodicalId":470300,"journal":{"name":"IETE Journal of Education","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135208086","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and Evaluation of Multipliers Using Simulated Annealing and Partitioning Approach 基于模拟退火和划分方法的乘法器设计与评价
IETE Journal of Education Pub Date : 2023-05-29 DOI: 10.1080/09747338.2023.2214514
Pavitra Y.J., Jamuna S., Manikandan J.
{"title":"Design and Evaluation of Multipliers Using Simulated Annealing and Partitioning Approach","authors":"Pavitra Y.J., Jamuna S., Manikandan J.","doi":"10.1080/09747338.2023.2214514","DOIUrl":"https://doi.org/10.1080/09747338.2023.2214514","url":null,"abstract":"Multipliers are widely used in various fields of engineering, and they are considered to have complex designs. The efficient design of multipliers to meet various design requirements is still an active area of research. In this paper, a thermo-inspired metaheuristic called population-based simulated annealing algorithm, for the design of multipliers using four different resource types, is proposed. Metaheuristics suffers from the problem of scalability and non-convergence as the size and complexity of the circuit increase. Four types of partitioning approaches- output, input, input-output and hybrid-output partitioning are proposed to overcome the same. Proposed partitioning approaches have increased the success rate and reduced the time to realize the circuit. The multipliers designed are synthesized on Cadence Genus with 90 nm technology and compared with traditional designs such as Array, Wallace tree, Dadda and Booth multipliers to conclude that metaheuristics are capable of generating near-optimal solutions in terms of power, area and delay.","PeriodicalId":470300,"journal":{"name":"IETE Journal of Education","volume":"485 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135791838","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
From the President's Desk 从总统的办公桌上
IETE Journal of Education Pub Date : 2023-01-02 DOI: 10.1080/09747338.2023.2229616
{"title":"From the President's Desk","authors":"","doi":"10.1080/09747338.2023.2229616","DOIUrl":"https://doi.org/10.1080/09747338.2023.2229616","url":null,"abstract":"Website: Our new website is fully up and running! I hope you’ve had a chance to check it out and feel free to give us your feedback. We are still new at using it, especially the many “behind the scenes” features it has, which we hope will make it easier for us to share new information with our members, share procedures with new Board members and provide an easier platform to help new board members understand all the areas of interest we have for volunteering! We are also working on video tutorials in case you’d like to learn more about our site that way. Stay tuned for updates this fall!","PeriodicalId":470300,"journal":{"name":"IETE Journal of Education","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-01-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135799862","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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