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2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)最新文献

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Application of the amplification matrix latency insertion method to circuits with dependent sources 放大矩阵延迟插入法在依赖源电路中的应用
2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) Pub Date : 2011-12-01 DOI: 10.1109/EDAPS.2011.6213771
Ping Liu, Jilin Tan, Zhongyong Zhou, J. Schutt-Ainé, P. Goh
{"title":"Application of the amplification matrix latency insertion method to circuits with dependent sources","authors":"Ping Liu, Jilin Tan, Zhongyong Zhou, J. Schutt-Ainé, P. Goh","doi":"10.1109/EDAPS.2011.6213771","DOIUrl":"https://doi.org/10.1109/EDAPS.2011.6213771","url":null,"abstract":"This paper applies the amplification matrix latency insertion method (LIM) to the circuits including dependent sources. The formulation derivation for the general circuits and the stability conditions of the amplification matrix LIM are presented in detail. Compared with the conventional scalar LIM, the amplification matrix LIM need much larger time step, so it can dramatically improve the performance. The simulation results validate the conclusion.","PeriodicalId":446239,"journal":{"name":"2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127194533","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A wideband omnidirectional planar microstrip antenna for WLAN applications 用于WLAN应用的宽带全向平面微带天线
2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) Pub Date : 2011-12-01 DOI: 10.1109/EDAPS.2011.6213811
Lei Wang, K. Wei, Jian Feng, Zhijun Zhang, Zhenghe Feng
{"title":"A wideband omnidirectional planar microstrip antenna for WLAN applications","authors":"Lei Wang, K. Wei, Jian Feng, Zhijun Zhang, Zhenghe Feng","doi":"10.1109/EDAPS.2011.6213811","DOIUrl":"https://doi.org/10.1109/EDAPS.2011.6213811","url":null,"abstract":"A novel wideband omnidirectional planar microstrip antenna is designed, fabricated and measured in this paper. The proposed planar array of collinear printed dipoles is composed of a series of sections of microstrip line with their top and bottom conductors transposed at each junction. Without any alteration to the microstrip radiator, the bandwidth of the proposed antenna is broadened by adopting a gap in the endfire direction between two adjacent elements. By tuning the width of the gap, good impedance matching can be obtained with a VSWR 2:1 (S11< −10dB) impedance bandwidth of 380 MHz (15.8%), covering the band range of WLAN (2.40–2.48GHz). The measured gain in the require band is higher than 6.5 dBi. The proposed antenna shows the merits of simple structure and good impedance matching, which are important for practical applications.","PeriodicalId":446239,"journal":{"name":"2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117035875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Characterization and modeling of nonlinearity in double-balanced mixers 双平衡混合器非线性的表征与建模
2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) Pub Date : 2011-12-01 DOI: 10.1109/EDAPS.2011.6213778
Hui Wang, Chunxiao Jian, Peiguo Liu
{"title":"Characterization and modeling of nonlinearity in double-balanced mixers","authors":"Hui Wang, Chunxiao Jian, Peiguo Liu","doi":"10.1109/EDAPS.2011.6213778","DOIUrl":"https://doi.org/10.1109/EDAPS.2011.6213778","url":null,"abstract":"A behavioral model describing the nonlinearity of a double-balanced mixer is presented. The analysis of a mixer is based on the diode I-V characteristics. A double frequency test method is used to extract the behavioral of the mixer. This method can measure the main channel and all spurious response. The measurement is carried out in a commercial mixer, and the results show that the method can extract the nonlinear behavioral of the mixer.","PeriodicalId":446239,"journal":{"name":"2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129451569","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
The integration of millimetre-wave active phased array antenna based on vector modulation technology 基于矢量调制技术的毫米波有源相控阵天线集成
2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) Pub Date : 2011-12-01 DOI: 10.1109/EDAPS.2011.6213752
Kewu Han, Ming-hui Yang, Yun Sun, Minhua Chen, Xiaowei Sun
{"title":"The integration of millimetre-wave active phased array antenna based on vector modulation technology","authors":"Kewu Han, Ming-hui Yang, Yun Sun, Minhua Chen, Xiaowei Sun","doi":"10.1109/EDAPS.2011.6213752","DOIUrl":"https://doi.org/10.1109/EDAPS.2011.6213752","url":null,"abstract":"To verify the feasibility of vector modulation technology in active phased array antenna (APAA), a Ka band 8×8 active phased array antenna composed of vector modulators was developed. Closed loop calibration method has been applied to achieve a good consistency among 8×8 channels by measuring and compensating the channel errors of the APAA system. The measured radiation patterns after calibration showed that the 8 ×8 APAA can steer the beam effectively, for its scanning angle of the beam can be reached between −40 degree and 40 degree with the side lobe level less than −10 dB on both E plane and H plane.","PeriodicalId":446239,"journal":{"name":"2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123913180","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Power noise suppression using dual spiral resonator with modified ground clearance for high-speed PCB 采用改进离地间隙的双螺旋谐振器抑制高速PCB的功率噪声
2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) Pub Date : 2011-12-01 DOI: 10.1109/EDAPS.2011.6213732
Tong-Ho Chung, Hee-Do Kang, Tae-Lim Song, J. Yook
{"title":"Power noise suppression using dual spiral resonator with modified ground clearance for high-speed PCB","authors":"Tong-Ho Chung, Hee-Do Kang, Tae-Lim Song, J. Yook","doi":"10.1109/EDAPS.2011.6213732","DOIUrl":"https://doi.org/10.1109/EDAPS.2011.6213732","url":null,"abstract":"In this paper, to the aim of 3.2 GHz noise suppression band with small area, investigation of several modified ground structure (MGS) dual spiral resonators are applied in the vicinity of the DDR3 high-speed circuit. Using two-turn dual spiral resonator, the area of the spiral on a power distribution network (PDN) is decreased to 45% compared with four-turn single spiral resonator and to achieve wider noise suppression frequency band, MGS dual spiral resonator, which make higher self resonance frequency (SRF) and inductance value, are applied. The proposed dual spiral resonator with MGS has 8 to 19 dB power noise suppression characteristic from second to fourth harmonic frequency band. By applying this concept, power noise suppression can be guaranteed with small area for various applications of the more high-speed digital circuits such as USB 3.0, SATA 3.0 or etc.","PeriodicalId":446239,"journal":{"name":"2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126368908","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
PDN impedance modeling of 3D system-in-package 三维系统级封装的PDN阻抗建模
2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) Pub Date : 2011-12-01 DOI: 10.1109/EDAPS.2011.6213751
Y. Oizono, Y. Nabeshima, T. Okumura, T. Sudo, A. Sakai, H. Ikeda
{"title":"PDN impedance modeling of 3D system-in-package","authors":"Y. Oizono, Y. Nabeshima, T. Okumura, T. Sudo, A. Sakai, H. Ikeda","doi":"10.1109/EDAPS.2011.6213751","DOIUrl":"https://doi.org/10.1109/EDAPS.2011.6213751","url":null,"abstract":"Power supply impedance of power distribution network (PDN) for a 3D system-in-package (SiP) has been investigated. The 3D SiP consisted of 3 stacked chips and an organic package substrate. These three chips were a memory chip on the top, Si interposer in the middle, and a logic chip on the bottom. The size of each chip was the same, and 9.93 mm by 9.93 mm. A large number of through silicon vias (TSV's) were formed to the silicon interposer and the logic chip. Next, the 3 stacked chips were assembled on the organic package substrate, whose size was 26 mm by 26 mm. The PDN impedance for each chip was extracted by using XcitePI (Sigrity Inc.). Then, the PDN impedance for the organic package substrate was extracted by using SIwave (Ansys Inc.). Finally, the total PDN impedance was synthesized. In this paper, the PDN impedances of the memory chip, Si interposer, and the logic chip were calculated respectively, and then the total PDN impedance was synthesized to estimate the power supply disturbance due to the anti-resonance peak.","PeriodicalId":446239,"journal":{"name":"2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115477551","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A metallic Febry-Perot cavity antenna with slot-type FSS and hybrid lateral boundaries for high aperture efficiency 具有高孔径效率的槽型FSS和混合横向边界的金属feb - perot腔天线
2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) Pub Date : 2011-12-01 DOI: 10.1109/EDAPS.2011.6213812
Yang Zhao, Zhijun Zhang, Zhenghe Feng
{"title":"A metallic Febry-Perot cavity antenna with slot-type FSS and hybrid lateral boundaries for high aperture efficiency","authors":"Yang Zhao, Zhijun Zhang, Zhenghe Feng","doi":"10.1109/EDAPS.2011.6213812","DOIUrl":"https://doi.org/10.1109/EDAPS.2011.6213812","url":null,"abstract":"A metallic Febry-Perot cavity antenna (FPCA) with high aperture efficiency is present. The partially reflective cover of the proposed FPCA is realized by cross-dipole-slot type metallic frequency selective surface (FSS). With the combination of hybrid lateral boundaries, high aperture efficiency is achieved. The configurations of the lateral boundaries are that two short side walls are set to be perpendicular to the cavity horizontal field, while two open side walls are set to be parallel to the operating horizontal mode. The final field in the horizontal plane is uniformly distributed and therefore high aperture efficiency is realized. A prototype with overall aperture dimension of 2.86λ× 2.86λ is designed, and the maximum realized directivity is 19.96dB at 14.27GHz, which corresponds to 96.4% aperture efficiency.","PeriodicalId":446239,"journal":{"name":"2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123664533","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A compact VCO based on LTCC technology 基于LTCC技术的紧凑型压控振荡器
2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) Pub Date : 2011-12-01 DOI: 10.1109/EDAPS.2011.6213784
Ziqiang Xu, H. Xia, Wei Tang, Xiaochuan Dai
{"title":"A compact VCO based on LTCC technology","authors":"Ziqiang Xu, H. Xia, Wei Tang, Xiaochuan Dai","doi":"10.1109/EDAPS.2011.6213784","DOIUrl":"https://doi.org/10.1109/EDAPS.2011.6213784","url":null,"abstract":"In this letter, a novel voltage control oscillator (VCO) is proposed and fabricated by low-temperature co-fired ceramic (LTCC) technology. Advanced three-dimensional packaging structure is utilized for size reduction by embedding passive components in multilayer substrate. According to the single π circuit configuration, the models of embedded helical inductors and coupling capacitors are established to optimize the match circuit of the VCO module. With the passive components embedded into multilayer ceramic substrate, the LTCC VCO exhibits advantages of small size and high reliability compared to conventional VCO module on PCB substrate. This proposed structural model is validated through actual LTCC process. Measured parameters show good performance and agree well with the EM simulation results. The physical dimension of the VCO module is only 10 mm×10 mm×1 mm, which makes it suitable for SIP communication system.","PeriodicalId":446239,"journal":{"name":"2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125014375","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Power/ground layers with EBG structure and ferrite film for noise suppression and power integrity improvement 具有EBG结构和铁氧体薄膜的电源/接地层，用于抑制噪声和提高电源完整性
2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) Pub Date : 2011-12-01 DOI: 10.1109/EDAPS.2011.6213804
F. Mahmood, Y. Toyota, K. Iokibe, K. Kondo, S. Yoshida
{"title":"Power/ground layers with EBG structure and ferrite film for noise suppression and power integrity improvement","authors":"F. Mahmood, Y. Toyota, K. Iokibe, K. Kondo, S. Yoshida","doi":"10.1109/EDAPS.2011.6213804","DOIUrl":"https://doi.org/10.1109/EDAPS.2011.6213804","url":null,"abstract":"Noise suppression and power integrity (PI) are two requirements for power/ground layers of printed circuit boards (PCBs). We have proposed the application of electromagnetic bandgap (EBG) structure and ferrite film to power/ground layers. In this paper, not only a test board with the proposed structure but three other test boards to be compared were fabricated to measure with a vector network analyzer. The measured data was evaluated for noise-suppression and PI characteristics. Additional evaluation using a commercial circuit simulator was carried out to evaluate noise-suppression and PI characteristics, assuming a real power-supply circuit. Through the evaluation, the test boards with ferrite film including the proposed structure provided sufficient results.","PeriodicalId":446239,"journal":{"name":"2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129840301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
New frequency dependent target impedance for DDR3 memory system DDR3存储系统新的频率相关目标阻抗
2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS) Pub Date : 2011-12-01 DOI: 10.1109/EDAPS.2011.6213774
Hayato Sasaki, M. Kanazawa, T. Sudo, Atsushi Tomishima, Toshiyuki Kaneko
{"title":"New frequency dependent target impedance for DDR3 memory system","authors":"Hayato Sasaki, M. Kanazawa, T. Sudo, Atsushi Tomishima, Toshiyuki Kaneko","doi":"10.1109/EDAPS.2011.6213774","DOIUrl":"https://doi.org/10.1109/EDAPS.2011.6213774","url":null,"abstract":"Anti-resonance peak in power distribution network (PDN) impedance must be avoided to prevent the interference between signal integrity and power integrity of a system. Conventional criteria of PDN impedance is a target impedance with a constant value over wide frequency range. However, the constant target impedance is not suitable for the high-speed systems, such as DDR-3 memory systems, because it is not cost effective to maintain PDN impedance as low as possible, especially in high frequency range. Furthermore, clock frequencies of modern LSIs already exceed the peak frequency of PDN impedance. In this paper, frequency spectrum of the power supply switching current of the ASIC driver has been used to define the target impedance in the DDR3 memory system. Frequency dependent target impedance has been obtained from the switching current spectrum. Degradation of signal integrity, such as eye height and jitter due to anti-resonance peaks have been checked by comparing the frequency dependent target impedance of DDR3 system.","PeriodicalId":446239,"journal":{"name":"2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129045777","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
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