{"title":"A new approach for direct discretization of fractional order operator in delta domain","authors":"Kumar Dolai, A. Mondal, P. Sarkar","doi":"10.2298/fuee2203313d","DOIUrl":"https://doi.org/10.2298/fuee2203313d","url":null,"abstract":"The fractional order system (FOS) comprises fractional order operator. In\u0000 order to obtain the discretized version of the fractional order system, the\u0000 first step is to discretize the fractional order operator, commonly\u0000 expressed as s?m, 0 < m < 1. The fractional order operator can be used as\u0000 fractional order differentiator or integrator, depending upon the values of\u0000 . In general, there are two approaches for discretization of fractional\u0000 order operator, one is indirect method of discretization and another is\u0000 direct method of discretization. The direct discretization method\u0000 capitalizes the method of formation of generating function where fractional\u0000 order operator s?m is expressed as a function of Z in the shift operator\u0000 parameterization and continued fraction expansion (CFE) method is then\u0000 utilized to get the corresponding discrete domain rational transfer\u0000 function. There is an inherent problem with this discretization method using\u0000 shift operator parameterization (discrete Z-domain). At fast sampling time,\u0000 the discretized version of the continuous time operator or system should\u0000 resemble that of the continuous time counterpart if the sampling theorem is\u0000 satisfied. At very high sampling rate, the shift operator parameterized\u0000 system fails to provide meaningful information due to its numerical ill\u0000 conditioning. To overcome this problem, Delta operator parameterization for\u0000 discretization is considered in this paper, where at fast sampling rate, the\u0000 continuous time results can be obtained from the discrete time experiments\u0000 and therefore a unified framework can be developed to get the discrete time\u0000 results and continuous time results hand to hand. In this paper a new\u0000 generating function is proposed to discretize the fractional order operator\u0000 using the Gauss-Legendre 2-point quadrature rule. Additionally, the function\u0000 has been expanded using the CFE in order to obtain rational approximation of\u0000 the fractional order operator. The detailed mathematical formulations along\u0000 with the simulation results in MATLAB, with different fractional order\u0000 systems are considered, in order to prove the newness of this formulation\u0000 for discretization of the FOS in complex Delta domain.","PeriodicalId":44296,"journal":{"name":"Facta Universitatis-Series Electronics and Energetics","volume":"107 1","pages":""},"PeriodicalIF":0.6,"publicationDate":"2022-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85749120","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Radivojević, M. Mileusnic, A. Lebl, V. Marinković-Nedelicki
{"title":"Comb jamming as a strategy for RCIED activation prevention","authors":"J. Radivojević, M. Mileusnic, A. Lebl, V. Marinković-Nedelicki","doi":"10.2298/fuee2203405r","DOIUrl":"https://doi.org/10.2298/fuee2203405r","url":null,"abstract":"The main objective of this paper is the analysis of comb jamming as a technique for RCIED activation prevention. Presentation of three strategies for comb signal generation follows after comprehensive survey of various jamming techniques in the introduction. There are two paper original contributions. The first one is quantitative comparison for three signal generation techniques of their emission power in relation to barrage jamming under the condition of equal BER value. The second contribution is determination of exact BER value as a function of emission power in the case of barrage jamming. Until now we have made different analyses and comparisons starting from estimated emission power. The analysis procedure is performed for QPSK modulated RCIED activation signal. Power saving is evident for all three methods of jamming signal generation. It is proved that additional 2.5dB of power saving is achieved by equalization of frequency components level in comb signal. The analysis in this paper shows that comb jamming allows the same effects as barrage jamming, but with lower emission power.","PeriodicalId":44296,"journal":{"name":"Facta Universitatis-Series Electronics and Energetics","volume":"1 1","pages":""},"PeriodicalIF":0.6,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74907904","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Design of a four stages VCO using a novel delay circuit for operation in distributed band frequencies","authors":"Mriganka Gogoi, P. Dutta","doi":"10.2298/fuee2204469g","DOIUrl":"https://doi.org/10.2298/fuee2204469g","url":null,"abstract":"The manuscript proposes a novel architecture of a delay cell that is implemented in 4-stage VCO which has the ability to operate in two distributed frequency bands. The operating frequency is chosen based on the principle of carrier mobility and the transistor resistance. The VCO uses dual delay input techniques to improve the frequency of operation. The design is implemented in Cadence 90nm GPDK CMOS technology and simulated results show that it is capable of operating in dual frequency bands of 55 MHz to 606 MHz and 857 MHz to 1049 MHz. At normal temperature (270) power consumption of the circuit is found to be 151?W at 606 MHz and 157?W at 1049 MHz respectively and consumes an area of 171.42?m2. The design shows good tradeoff between the parameters-operating frequency, phase noise and power consumption.","PeriodicalId":44296,"journal":{"name":"Facta Universitatis-Series Electronics and Energetics","volume":"89 1","pages":""},"PeriodicalIF":0.6,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80362333","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"New approach to a DS-CDMA-UWB system using a pseudo orthogonal code (POC)","authors":"Kada Biteur, B. Benadda, A. Ayad","doi":"10.2298/fuee2204483b","DOIUrl":"https://doi.org/10.2298/fuee2204483b","url":null,"abstract":"Ultra-Wideband Direct Sequences Code Division Multiple Access (DS-DMA) plays an important role in the case of multi-terminal multi-application communications of UWB devices. In the case of UWB systems that exploit the injection of the pulse itself directly to the antenna hence the very wide bandwidth, generation of suitable DS-CDMA codes poses a real challenge. In this paper we will describe our novel UWB transmission which uses pseudo-orthogonal time code (POC) as DS-CDMA sequences. The suggested codes are unipolar sequences with chips that may be dynamically modified to target a certain number of users or applications. Our approach bypasses the modulations schemes commonly used on UWB systems. Moreover, as perspectives to our work, it would be very interesting to realize our new approach based on an FPGA circuit.","PeriodicalId":44296,"journal":{"name":"Facta Universitatis-Series Electronics and Energetics","volume":"27 1","pages":""},"PeriodicalIF":0.6,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88584540","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Realization of a variable resolution modified semiflash ADC based on bit segmentation scheme","authors":"Pranati Ghoshal, C. Dey, S. Sen","doi":"10.2298/fuee2201061g","DOIUrl":"https://doi.org/10.2298/fuee2201061g","url":null,"abstract":"A modified variable resolution semiflash ADC, based on ?bit segmentation scheme?, is presented. Its speed and comparator count are identical to a normal flash ADC. An 8-bit ADC has 256 different bit combinations. Sixteen consecutive bit combinations from the MSB side - beginning with the first one, remain unaltered for such an ADC. It continues this way till the last group of sixteen bits. In the designed circuit, the four MSB and four LSB bits are determined in the first and second part of the clock. Following the same logic, the bits in a 16-bit ADC can be found out in only two clock cycles by employing only fifteen comparators. It implies that a higher resolution ADC can easily be determined with low power and small die area. It is tested in P-SIM Professional 9 for an 8-bit ADC and curves drawn to establish the validity of the proposal.","PeriodicalId":44296,"journal":{"name":"Facta Universitatis-Series Electronics and Energetics","volume":"27 1","pages":""},"PeriodicalIF":0.6,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87260544","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Implementation of voice call transfer service between smart phone and tablet through Wi-Fi","authors":"D. Kolluru, Bhaskara Puchakayala","doi":"10.2298/fuee2202217k","DOIUrl":"https://doi.org/10.2298/fuee2202217k","url":null,"abstract":"Communication through voice call leads to significant growth in technology in distant areas where two or more people from opposite ends of world will connect. This research describes a case study of voice call transfer service. This research aims at designing a system that will allow Android users to communicate over Wi-Fi. This design is able to transfer voice of incoming telephone caller over Wi-Fi network at real time through UDP. It uses client/server architecture: Server for receiving telephone call and transferring voice (one user) and client for receiving incoming caller voice and enables communication with server. Architecture designed could be used on Android smart phones with telephony enabled and tablets with telephony not enabled. Outcome of this research will allow users to communicate on real time at no cost. Proposed design gives cost effective, reliable and real time voice communication over Wi-Fi. It provides good and comfort experience to users in emergency situation where user cannot effort cost for telephone call. Proposed design is useful for educational organizations, construction buildings, shopping malls and hospitals which point to new possibilities for voice communication.","PeriodicalId":44296,"journal":{"name":"Facta Universitatis-Series Electronics and Energetics","volume":"60 1","pages":""},"PeriodicalIF":0.6,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73088079","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Improving performance of transmission networks using facts through continuation power flow method","authors":"J. Alnasseir","doi":"10.2298/fuee2203437a","DOIUrl":"https://doi.org/10.2298/fuee2203437a","url":null,"abstract":"Over the past 50 years, modern electrical systems have become more complex, as they overrun the geographical boundaries of neighboring countries. The problem is that the power system faces many challenges, because it is exposed to difficult operating conditions. The phenomenon of voltage instability is the most frequent phenomenon, and this can lead to the collapse of the power system. To avoid power outages in the system (especially in blackout situations), the power system must be analyzed in order to maintain voltage stability in the expected difficult operating conditions. The main objective is to determine the maximum load capacity of the system and the causes of voltage instability. The voltage instability problem is related to the nature of nonlinear loads, so different load characteristics must be taken into consideration when analyzing voltage stability. This study aims to discover the maximum load capacity required by using the continuous power flow method (CPF) in the studied network. Then, the performance of this network using a Flexible Alternating Current Transmission System (FACTS) will be utilized. FACTS systems present a promising solution in improving the voltage stability by improving the power transmission capacity and controllability of the parameters of the existing power networks. This study will be conducted on a reference network platform under normal working conditions, then installation of one of the FACTS systems will show its effect on improving voltage stability. The continuous power flow method will be used to find PV curves, which in turn will help to determine the conditions of maximum loading while maintaining stability, and identify the bus bar with the smallest voltage, on which the flexible AC systems will be installed. The software environment MATLAB/PSAT will be used for modeling and simulation.","PeriodicalId":44296,"journal":{"name":"Facta Universitatis-Series Electronics and Energetics","volume":"11 1","pages":""},"PeriodicalIF":0.6,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82850361","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
G. Nikolic, B. Dimitrijevic, T. Nikolic, M. Stojcev
{"title":"Fifty years of microprocessor evolution: from single CPU to multicore and manycore systems","authors":"G. Nikolic, B. Dimitrijevic, T. Nikolic, M. Stojcev","doi":"10.2298/fuee2202155n","DOIUrl":"https://doi.org/10.2298/fuee2202155n","url":null,"abstract":"Nowadays microprocessors are among the most complex electronic systems that man has ever designed. One small silicon chip can contain the complete processor, large memory and logic needed to connect it to the input-output devices. The performance of today's processors implemented on a single chip surpasses the performance of a room-sized supercomputer from just 50 years ago, which cost over $ 10 million [1]. Even the embedded processors found in everyday devices such as mobile phones are far more powerful than computer developers once imagined. The main components of a modern microprocessor are a number of general-purpose cores, a graphics processing unit, a shared cache, memory and input-output interface and a network on a chip to interconnect all these components [2]. The speed of the microprocessor is determined by its clock frequency and cannot exceed a certain limit. Namely, as the frequency increases, the power dissipation increases too, and consequently the amount of heating becomes critical. So, silicon manufacturers decided to design new processor architecture, called multicore processors [3]. With aim to increase performance and efficiency these multiple cores execute multiple instructions simultaneously. In this way, the amount of parallel computing or parallelism is increased [4]. In spite of mentioned advantages, numerous challenges must be addressed carefully when more cores and parallelism are used. This paper presents a review of microprocessor microarchitectures, discussing their generations over the past 50 years. Then, it describes the currently used implementations of the microarchitecture of modern microprocessors, pointing out the specifics of parallel computing in heterogeneous microprocessor systems. To use efficiently the possibility of multi-core technology, software applications must be multithreaded. The program execution must be distributed among the multi-core processors so they can operate simultaneously. To use multi-threading, it is imperative for programmer to understand the basic principles of parallel computing and parallel hardware. Finally, the paper provides details how to implement hardware parallelism in multicore systems.","PeriodicalId":44296,"journal":{"name":"Facta Universitatis-Series Electronics and Energetics","volume":"20 1","pages":""},"PeriodicalIF":0.6,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89250795","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Fuzzy-based real-coded genetic algorithm for optimizing non-convex environmental economic loss dispatch","authors":"S. Parihar, Nitin Malik","doi":"10.2298/fuee2204495p","DOIUrl":"https://doi.org/10.2298/fuee2204495p","url":null,"abstract":"A non-convex Environmental Economic Loss Dispatch (NCEELD) is a constrained multi-objective optimization problem that has been solved for assigning generation cost to all the generators of the power network with equality and inequality constraints. The objectives considered for simultaneous optimization are emission, economic load and network loss dispatch. The valve-point loading, prohibiting operating zones and ramp rate limit issues have also been taken into consideration in the generator fuel cost. The tri-objective problem is transformed into a single objective function via the price penalty factor. The NCEELD problem is simultaneously optimized using a fuzzy based real-coded genetic algorithm (GA). The proposed technique determines the best solution from a Pareto optimal solution set based on the highest rank. The efficacy of the projected method has been demonstrated on the IEEE 30-bus network with three and six generating units. The attained results are compared to existing results and found superior in terms of finding the best-compromise solution over other existing methods such as GA, particle swarm optimization, flower pollination algorithm, biogeography-based optimization and differential evolution. The statistical analysis has also been carried out for convex multi-objective problem.","PeriodicalId":44296,"journal":{"name":"Facta Universitatis-Series Electronics and Energetics","volume":"153 1","pages":""},"PeriodicalIF":0.6,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86206936","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Bibek Chettri, Abinash Thapa, S. Das, P. Chettri, B. Sharma
{"title":"First principle insight into co-doped MoS2 for sensing NH3 and CH4","authors":"Bibek Chettri, Abinash Thapa, S. Das, P. Chettri, B. Sharma","doi":"10.2298/fuee2201043c","DOIUrl":"https://doi.org/10.2298/fuee2201043c","url":null,"abstract":"In this work we present the atomistic computational study of the adsorption properties of Co doped MoS2 adsorbed ammonia (NH3) and methane (CH4). The adsorption distance, adsorption energy (Ead), charge transfer (Qt), bandgap, Density of States (DOS), Projected Density of States (PDOS), transport properties, sensitivity and recovery time have been reported. The diffusion property of the system was calculated using Nudge Elastic Band (NEB) method. The calculated results depict that after suitable doping of Co on MoS2 monolayer decreases the resistivity of the system and makes it more suitable for application as a sensor. After adsorbing NH3 and CH4, Co doped MoS2 bandgap, DOS and PDOS become more enhanced. The adsorption energy calculated for NH3 and CH4 adsorbed Co doped MoS2 are -0.9 eV and -1.4 eV. The reaction is exothermic and spontaneous. The I-V curve for Co doped MoS2 for CH4 and NH3 adsorption shows a linear increase in current up to 1.4 V and 2 V, respectively, then a rapid decline in current after increasing a few volts. The Co doped MoS2 based sensor has a better relative resistance state, indicating that it can be employed as a sensor. The sensitivity for CH4 and NH3 were 124 % and 360.5 %, respectively, at 2 V. With a recovery time of 0.01s, the NH3 system is the fastest. In a high-temperature condition/environment, the Co doped MoS2 monolayer has the potential to adsorb NH3 and CH4 gas molecules. According to NEB, CH4 gas molecules on Co doped MoS2 has the lowest energy barrier as compared to NH3 gas molecules. Our results indicate that adsorbing NH3 and CH4 molecules in the interlayer is an effective method for producing Co doped MoS2 monolayers for use as spintronics sensor materials.","PeriodicalId":44296,"journal":{"name":"Facta Universitatis-Series Electronics and Energetics","volume":"50 1","pages":""},"PeriodicalIF":0.6,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74297858","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}