Proceedings of SPDP '96: 8th IEEE Symposium on Parallel and Distributed Processing最新文献

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A deterministic model of time for distributed systems 分布式系统的确定性时间模型
J. Carroll, A. Borshchev
{"title":"A deterministic model of time for distributed systems","authors":"J. Carroll, A. Borshchev","doi":"10.1109/SPDP.1996.570389","DOIUrl":"https://doi.org/10.1109/SPDP.1996.570389","url":null,"abstract":"The paper proposes a linear, deterministic, logical time model for distributed systems. The authors give an account of causality within distributed systems which undergirds the time model. They discuss some advantages for the application programmer in using the time model.","PeriodicalId":360478,"journal":{"name":"Proceedings of SPDP '96: 8th IEEE Symposium on Parallel and Distributed Processing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131079363","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
B/sup mad/-tree: an efficient data structure for parallel processing B/sup /-tree:用于并行处理的高效数据结构
Sajal K. Das, M. Demuynck
{"title":"B/sup mad/-tree: an efficient data structure for parallel processing","authors":"Sajal K. Das, M. Demuynck","doi":"10.1109/SPDP.1996.570359","DOIUrl":"https://doi.org/10.1109/SPDP.1996.570359","url":null,"abstract":"B-trees are used for accessing large database files, stored in lexicographic order on the secondary storage devices. Algorithms for concurrent B-tree data structures achieve only limited speedup when implemented on a parallel computer. To improve the performance, we propose a variant of the B/sup link/-tree, called the B/sup mad/-tree, which allows insertion without node splits, with multiple access in its leaf nodes, and dilation in both the index and the leaf nodes. Parallel algorithms for search, insert and restructuring are designed for partitioned, locked and distributed models. Only part of an insertion node is locked during the insert, and simultaneous insertions by multiple processors in the same node are allowed. A restructuring algorithm runs periodically in the background and requires at most one wait by any search or update operation. Our implementations demonstrate that the B/sup mad/-tree algorithms outperform the best known B/sup link/-trees, and compare favorably with linear hashing. We achieve good speedup (e.g., 4.79 with 8 processors) for partitioned algorithms, and moderate speedup (2.49 with 8 processors) for locked algorithms, even including overhead costs. The insert times obtained for B/sup mad/-trees are 50% to 60% less than that for the B/sup link/-trees in partitioned implementations, and 70% to 80% less in locked implementations. The speedup results on the distributed memory platform (a network of workstations) were not that encouraging due to high communication costs.","PeriodicalId":360478,"journal":{"name":"Proceedings of SPDP '96: 8th IEEE Symposium on Parallel and Distributed Processing","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130222022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A deterministic parallel algorithm for the homing sequence problem 寻的序列问题的确定性并行算法
B. Ravikumar
{"title":"A deterministic parallel algorithm for the homing sequence problem","authors":"B. Ravikumar","doi":"10.1109/SPDP.1996.570376","DOIUrl":"https://doi.org/10.1109/SPDP.1996.570376","url":null,"abstract":"Homing sequences play an important role in the testing of finite state systems and have been used in a number of applications such as hardware fault detection, protocol verification, and learning algorithms etc. Recent applications of homing sequences involve large DFAs with thousands of states. Such applications motivate the design of a parallel algorithm for this problem. The author present a deterministic parallel algorithm of time complexity O(/spl radic/nlog/sup 2/n) using a polynomial number of processors on the CREW PRAM model. No faster deterministic parallel algorithm is known for this problem. The author also discusses the parallel complexity of some related problems.","PeriodicalId":360478,"journal":{"name":"Proceedings of SPDP '96: 8th IEEE Symposium on Parallel and Distributed Processing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130243507","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
A hardware multicast routing algorithm for two-dimensional meshes 二维网格的硬件组播路由算法
P. Mohapatra, Vara Varavithya
{"title":"A hardware multicast routing algorithm for two-dimensional meshes","authors":"P. Mohapatra, Vara Varavithya","doi":"10.1109/SPDP.1996.570334","DOIUrl":"https://doi.org/10.1109/SPDP.1996.570334","url":null,"abstract":"Multicast communication is a significant operation an multicomputer systems and can be used to support several other collective communication operations. Hardware implementation is a viable solution to develop a low latency multicast algorithm. In this paper, we present a new multicast routing algorithm for two-dimensional meshes. The algorithm uses wormhole routing mechanism and can send messages to any number of destinations within two start-up communication phases; hence the name, two-phase multicast (TPM) algorithm. The algorithm uses the base routing scheme used for unicast communication, thus minimizing the additional hardware support. The algorithm allows some intermediate nodes that are not in the destination set to perform multicast functions. This feature allows flexibility in multicast path selection and therefore improves the performance. A simulation study has been conducted to investigate the performance of the purposed TPM algorithm. The simulation results show that the proposed TPM algorithm performs significantly better for both contention-free and mixed-traffic conditions, when compared with the previously proposed multicast algorithms.","PeriodicalId":360478,"journal":{"name":"Proceedings of SPDP '96: 8th IEEE Symposium on Parallel and Distributed Processing","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125407603","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
A heterogeneous hierarchical solution to cost-efficient high performance computing 一种异构分层解决方案,以实现经济高效的高性能计算
Zina Ben-Miled, J. Fortes
{"title":"A heterogeneous hierarchical solution to cost-efficient high performance computing","authors":"Zina Ben-Miled, J. Fortes","doi":"10.1109/SPDP.1996.570326","DOIUrl":"https://doi.org/10.1109/SPDP.1996.570326","url":null,"abstract":"Two facts that suggest the desirability of a hierarchical approach to cost-effective high-performance computing are empirically established in this paper. The first fact is the temporal locality of programs with respect to the degree of parallelism. Two temporal (instruction and data) locality principles are identified and empirically established for a set of programs. The impact of this behavior is discussed with respect to the proposed heterogeneous multilevel architecture. The second fact that supports the hierarchical architecture is the cost-efficiency advantage of heterogeneous over homogeneous multiprocessor systems. An initial performance analysis is presented which quantifies this fact for the proposed heterogeneous hierarchical organization. The proposed multilevel processor configuration uses fast and costly resources sparingly to reduce sequential and low parallelism bottlenecks. The resulting organization tries to balance cost, speed and parallelism granularity.","PeriodicalId":360478,"journal":{"name":"Proceedings of SPDP '96: 8th IEEE Symposium on Parallel and Distributed Processing","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126903304","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
A load balancing algorithm for bus-oriented systems 面向总线系统的负载平衡算法
B. Joshi, S. Hosseini, K. Vairavan
{"title":"A load balancing algorithm for bus-oriented systems","authors":"B. Joshi, S. Hosseini, K. Vairavan","doi":"10.1109/SPDP.1996.570357","DOIUrl":"https://doi.org/10.1109/SPDP.1996.570357","url":null,"abstract":"We report the results of a study of the performance of a load balancing algorithm for bus-oriented systems based on graph coloring. In this algorithm the processors use local knowledge for the purpose of load balancing. Node coloring concept is used to group the processors. This avoids the selection/rejection operations encountered in many load balancing algorithms proposed in the literature. Also, there is no central controller and the algorithm is easily adaptable to changes in the system configurations. The interconnection network of the system is modeled by a graph where the nodes represent buses and an edge between two nodes in the graph implies that the two buses are connected through a common processor. The primary performance metrics used are the average response time of the system and the system distance. We express the analytical results in terms of upper and lower bounds on these metrics.","PeriodicalId":360478,"journal":{"name":"Proceedings of SPDP '96: 8th IEEE Symposium on Parallel and Distributed Processing","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122307612","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Virtual embeddings on regular topology networks 规则拓扑网络上的虚拟嵌入
B. Yener
{"title":"Virtual embeddings on regular topology networks","authors":"B. Yener","doi":"10.1109/SPDP.1996.570384","DOIUrl":"https://doi.org/10.1109/SPDP.1996.570384","url":null,"abstract":"The paper considers distributed processing over a switch-based LAN and addresses loss-free routing of non-reserved, bursty data traffic. The approach is based on embedding multiple virtual rings onto the underlying network topology with the following two constraints: (i) each virtual ring is Hamiltonian (i.e., includes each node exactly once), and (ii) rings are mutually edge disjoint. New techniques to obtain such virtual rings in the hypercube and circulant networks are presented. Each virtual ring may operate like a buffer insertion ring with fairness. The routing algorithm on the multiple virtual rings is a generalization of convergence routing and it ensures loss-free and deterministic delivery of bursty traffic. The bounds on the length of routing are studied both analytically and computationally. It is shown that an upper bound of O(N/d) on the maximum length of routing can be obtained on the networks with d virtual ring embeddings.","PeriodicalId":360478,"journal":{"name":"Proceedings of SPDP '96: 8th IEEE Symposium on Parallel and Distributed Processing","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124896933","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
A hierarchical processor scheduling policy for multiprocessor systems 多处理器系统的分层处理器调度策略
Samir Ayachi, S. Dandamudi
{"title":"A hierarchical processor scheduling policy for multiprocessor systems","authors":"Samir Ayachi, S. Dandamudi","doi":"10.1109/SPDP.1996.570322","DOIUrl":"https://doi.org/10.1109/SPDP.1996.570322","url":null,"abstract":"Processor scheduling policies can be broadly divided into space-sharing and time-sharing policies. Space-sharing policies partition system processors and each partition is allocated exclusively to a job. In time-sharing policies, processors are temporally shared by jobs (e.g., in a round robin fashion). Equipartition is a dynamic space-sharing policy that has been proposed and studied extensively. Among the time-sharing policies, job-based round robin policy (RRJob) has been shown to be a very good policy. Performance analysis of these two policies suggests that Equipartition policy performs well at low to moderate system loads and is extremely sensitive to system overheads and variance in service demand of jobs. RRJob performs better when there is a high variance in service demand and at high system loads. Furthermore, these policies have been proposed for small-scale shared-memory systems and require a central run queue and/or central scheduler. The central queue/scheduler poses serious scalability problems for large-scale multiprocessor systems. We propose a new multiprocessor scheduling policy that combines the merits of space-sharing and time-sharing policies while eliminating the contention for the central queue/scheduler. The new policy, called hierarchical scheduling policy (HSP), uses a hierarchical run queue organization to take advantage of both temporal and spatial partitioning to allocate processing power amongst jobs waiting for service. We show that the HSP policy is considerably better than the purely space-sharing and purely time-sharing policies over a wide range of system parameters.","PeriodicalId":360478,"journal":{"name":"Proceedings of SPDP '96: 8th IEEE Symposium on Parallel and Distributed Processing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125203952","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Improved algorithms and data structures for solving graph problems in external memory 改进了在外部存储器中解决图形问题的算法和数据结构
Vijay Kumar, E. Schwabe
{"title":"Improved algorithms and data structures for solving graph problems in external memory","authors":"Vijay Kumar, E. Schwabe","doi":"10.1109/SPDP.1996.570330","DOIUrl":"https://doi.org/10.1109/SPDP.1996.570330","url":null,"abstract":"Recently, the study of I/O-efficient algorithms has moved beyond fundamental problems of sorting and permuting and into wider areas such as computational geometry and graph algorithms. With this expansion has come a need for new algorithmic techniques and data structures. In this paper, we present I/O-efficient analogues of well-known data structures that we show to be useful for obtaining simpler and improved algorithms for several graph problems. Our results include improved algorithms for minimum spanning trees, breadth-first search, and single-source shortest paths. The descriptions of these algorithms are greatly simplified by their use of well-defined I/O-efficient data structures with good amortized performance bounds. We expect that I/O efficient data structures such as these will be a useful tool for the design-of I/O-efficient algorithms.","PeriodicalId":360478,"journal":{"name":"Proceedings of SPDP '96: 8th IEEE Symposium on Parallel and Distributed Processing","volume":"100 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115427505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 141
Improving the parallelism and concurrency in decoupled architectures 改进解耦架构中的并行性和并发性
L. John, R. Radhakrishnan
{"title":"Improving the parallelism and concurrency in decoupled architectures","authors":"L. John, R. Radhakrishnan","doi":"10.1109/SPDP.1996.570325","DOIUrl":"https://doi.org/10.1109/SPDP.1996.570325","url":null,"abstract":"Concurrency between access and execution has been exploited by queues in many decoupled access-execute architectures, but data dependent control dependencies often prohibit prefetching of data to queues. This paper investigates a technique to facilitate anticipatory loading to queues even in presence of data dependent control dependencies. The proposed method consists of fetching along one or both paths of a data dependent control dependency and inserting consume instructions in appropriate paths to consume the unnecessarily fetched data. The compiler hoists load instructions above control dependencies as in conventional load hoisting techniques. The technique is seen to be very effective in programs with data dependent if-then-else's. We also present an architecture with multiple access units, the mLSU architecture, which parallelizes the access process. Simulation experiments illustrate that multiple access units improve the performance if access processor instruction issue is a bottleneck.","PeriodicalId":360478,"journal":{"name":"Proceedings of SPDP '96: 8th IEEE Symposium on Parallel and Distributed Processing","volume":"180 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-10-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123182243","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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