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Moore's law at 50: Are we planning for retirement? 50岁时的摩尔定律:我们在为退休做计划吗?
2015 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2015-12-01 DOI: 10.1109/IEDM.2015.7409607
G. Yeric
{"title":"Moore's law at 50: Are we planning for retirement?","authors":"G. Yeric","doi":"10.1109/IEDM.2015.7409607","DOIUrl":"https://doi.org/10.1109/IEDM.2015.7409607","url":null,"abstract":"The Moore's Law era enjoyed a long run of lithographically-enabled pitch shrinking that directly reduced the cost per (von Neumann) function, as well as system power and performance improvements, via Dennard scaling. At the 50 year mark, the outlook for Moore's Law is muddier, as we encounter exponential complexity in MOS VLSI scaling and an increasing set of design limitations, including power limits, parasitics, variability, and of course cost. To continue to create compelling product scaling, we will increasingly require \"all-of-the-above\" advancements, more directly linking the MOS VLSI scaling to the circuits to the systems, in an era where future systems may be different than the computers we are familiar with.","PeriodicalId":336637,"journal":{"name":"2015 IEEE International Electron Devices Meeting (IEDM)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129542784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 56
A next generation CMOS-compatible GaN-on-Si transistors for high efficiency energy systems 用于高效能源系统的下一代cmos兼容GaN-on-Si晶体管
2015 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2015-12-01 DOI: 10.1109/IEDM.2015.7409663
K.Y. Wong, M. Kwan, F. Yao, M. Tsai, Y.-S. Lin, Y.C. Chang, P.-C. Chen, R. Su, J.-L. Yu, F. Yang, G. Lansbergen, C. Hsiung, Y. Lai, Kai-Lin Chiu, C. F. Chen, M. Lin, H.-Y Wu, C. Chiang, S.-D Liu, H. Chiu, P.C. Liu, C.-M. Chen, C. Yu, C. Tsai, C.-B. Wu, B. Lin, M. Chang, J.-S. You, S.P. Wang, L.-C Chen, Y. Liao, L. Tsai, Tom Tsai, H. Tuan, A. Kalnitsky
{"title":"A next generation CMOS-compatible GaN-on-Si transistors for high efficiency energy systems","authors":"K.Y. Wong, M. Kwan, F. Yao, M. Tsai, Y.-S. Lin, Y.C. Chang, P.-C. Chen, R. Su, J.-L. Yu, F. Yang, G. Lansbergen, C. Hsiung, Y. Lai, Kai-Lin Chiu, C. F. Chen, M. Lin, H.-Y Wu, C. Chiang, S.-D Liu, H. Chiu, P.C. Liu, C.-M. Chen, C. Yu, C. Tsai, C.-B. Wu, B. Lin, M. Chang, J.-S. You, S.P. Wang, L.-C Chen, Y. Liao, L. Tsai, Tom Tsai, H. Tuan, A. Kalnitsky","doi":"10.1109/IEDM.2015.7409663","DOIUrl":"https://doi.org/10.1109/IEDM.2015.7409663","url":null,"abstract":"CMOS-compatible 100 V / 650 V enhancement-mode high electron mobility transistors (E-HEMTs) and 650 V depletion-mode MISFET (D-MISFET) are fabricated on 6-inch GaN-on-Si wafers. These devices show excellent power converter switching performances. Both 100 V and 650 V E-HEMTs had passed industrial reliability qualifications. The importance of bulk leakage, interface quality and gate trapping in dynamic on-resistance is figured out. The device with optimized processes shows a significant reduction of the dynamic on-resistance degradation.","PeriodicalId":336637,"journal":{"name":"2015 IEEE International Electron Devices Meeting (IEDM)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127526465","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 47
A reliable CMOS-MEMS platform for titanium nitride composite (TiN-C) resonant transducers with enhanced electrostatic transduction and frequency stability 一个可靠的CMOS-MEMS平台，用于氮化钛复合材料(TiN-C)谐振换能器，具有增强的静电换能器和频率稳定性
2015 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2015-12-01 DOI: 10.1109/IEDM.2015.7409727
Ming-Huang Li, Chao-Yu Chen, Sheng-Shian Li
{"title":"A reliable CMOS-MEMS platform for titanium nitride composite (TiN-C) resonant transducers with enhanced electrostatic transduction and frequency stability","authors":"Ming-Huang Li, Chao-Yu Chen, Sheng-Shian Li","doi":"10.1109/IEDM.2015.7409727","DOIUrl":"https://doi.org/10.1109/IEDM.2015.7409727","url":null,"abstract":"A reliable CMOS-MEMS platform for on-chip resonant transducer and readout circuit integration is presented in this paper with (i) well-defined etch stops and relaxed release windows for high fabrication yield, (ii) narrow transducer gaps (<; 400nm) for efficient electrostatic transduction, and (iii) novel titanium nitride composite (TiN-C) structure for dielectric charge elimination and temperature compensation. With the proposed platform, MEMS resonant transducers which exhibit low frequency drift over temperature and time, excellent electrostatic coupling, and inherent CMOS circuit integration are successfully demonstrated.","PeriodicalId":336637,"journal":{"name":"2015 IEEE International Electron Devices Meeting (IEDM)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128307041","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
A 3/5 GHz reconfigurable CMOS low-noise amplifier integrated with a four-terminal phase-change RF switch 一个3/5 GHz可重构CMOS低噪声放大器集成了一个四端相变射频开关
2015 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2015-12-01 DOI: 10.1109/IEDM.2015.7409764
Rahul Singh, G. Slovin, Min Xu, Ahmad Khairi, S. Kundu, T. E. Schlesinger, J. Bain, J. Paramesh
{"title":"A 3/5 GHz reconfigurable CMOS low-noise amplifier integrated with a four-terminal phase-change RF switch","authors":"Rahul Singh, G. Slovin, Min Xu, Ahmad Khairi, S. Kundu, T. E. Schlesinger, J. Bain, J. Paramesh","doi":"10.1109/IEDM.2015.7409764","DOIUrl":"https://doi.org/10.1109/IEDM.2015.7409764","url":null,"abstract":"This paper presents the first reported in-situ reconfiguration of a narrowband CMOS low noise amplifier (LNA) over two widely separated frequency bands using a GeTe phase-change (PC) switch. Previous work has demonstrated the attractiveness of CMOS-PC integration to realize high-performance reconfigurable RF front-end circuits [1-2]. Four-terminal PC switches with small form factor have been recently shown to possess close-to-ideal properties of an RF switch: a high OFF/ON resistance ratio and extremely high figure-of-merit for RF switches (FCO = 1/(2πRONCOFF)) [3-4]. In this work, we present a robust realization of a reconfigurable 3/5 GHz LNA designed and fabricated in a 0.13 μm CMOS process and flip-chip integrated with a four-terminal PC switch fabricated using an in-house process.","PeriodicalId":336637,"journal":{"name":"2015 IEEE International Electron Devices Meeting (IEDM)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128331148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
STT-MRAM with double magnetic tunnel junctions STT-MRAM双磁隧道结
2015 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2015-12-01 DOI: 10.1109/IEDM.2015.7409772
G. Hu, J. Lee, J. Nowak, J. Sun, J. Harms, A. Annunziata, S. Brown, W. Chen, Y. H. Kim, G. Lauer, L. Liu, N. Marchack, S. Murthy, E. O'Sullivan, J. Park, M. Reuter, R. Robertazzi, P. Trouilloud, Y. Zhu, D. Worledge
{"title":"STT-MRAM with double magnetic tunnel junctions","authors":"G. Hu, J. Lee, J. Nowak, J. Sun, J. Harms, A. Annunziata, S. Brown, W. Chen, Y. H. Kim, G. Lauer, L. Liu, N. Marchack, S. Murthy, E. O'Sullivan, J. Park, M. Reuter, R. Robertazzi, P. Trouilloud, Y. Zhu, D. Worledge","doi":"10.1109/IEDM.2015.7409772","DOIUrl":"https://doi.org/10.1109/IEDM.2015.7409772","url":null,"abstract":"We report switching performance of perpendicularly magnetized Spin-Transfer Torque MRAM (STT-MRAM) devices with double tunnel barriers and two reference layers. We show that stacks with double tunnel barriers improve the switching efficiency (Eb/Ic0) by 2x, when compared to similar stacks with a single tunnel barrier. Switching efficiency up to 10 kBT/uA was observed in single devices. A large operating window, Vbreakdown-Vclons ~ 0.7 V was achieved for 40nm devices, compared to 0.2V in single tunnel barrier devices.","PeriodicalId":336637,"journal":{"name":"2015 IEEE International Electron Devices Meeting (IEDM)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128358281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 62
Time dependent threshold-voltage fluctuations in NAND flash memories: From basic physics to impact on array operation NAND闪存中与时间相关的阈值电压波动:从基本物理到对阵列操作的影响
2015 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2015-12-01 DOI: 10.1109/IEDM.2015.7409699
A. Goda, C. Miccoli, C. M. Compagnoni
{"title":"Time dependent threshold-voltage fluctuations in NAND flash memories: From basic physics to impact on array operation","authors":"A. Goda, C. Miccoli, C. M. Compagnoni","doi":"10.1109/IEDM.2015.7409699","DOIUrl":"https://doi.org/10.1109/IEDM.2015.7409699","url":null,"abstract":"Introduction: Random telegraph noise (RTN) during read and charge detrapping during data retention cause time dependent threshold voltage (VT) fluctuations in NAND flash memories [1-9]. This paper reviews and discusses the physics of these phenomena and the impact on NAND array reliability based on characteristics of aggressively scaled 2D planar NAND cells [10][11]. The discussion is further extended to 3D NAND.","PeriodicalId":336637,"journal":{"name":"2015 IEEE International Electron Devices Meeting (IEDM)","volume":"316 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120950582","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 21
Implantation free GAA double spacer poly-Si nanowires channel junctionless FETs with sub-1V gate operation and near ideal subthreshold swing 具有亚1v栅极工作和接近理想亚阈值摆幅的无植入GAA双间隔多晶硅纳米线沟道无结场效应管
2015 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2015-12-01 DOI: 10.1109/IEDM.2015.7409639
P. Kuo, Jer-Yi Lin, T. Chao
{"title":"Implantation free GAA double spacer poly-Si nanowires channel junctionless FETs with sub-1V gate operation and near ideal subthreshold swing","authors":"P. Kuo, Jer-Yi Lin, T. Chao","doi":"10.1109/IEDM.2015.7409639","DOIUrl":"https://doi.org/10.1109/IEDM.2015.7409639","url":null,"abstract":"The implantation free gate-all-around (GAA) double spacer poly-Si nanowires (NWs) channel junctionless (JL) FETs (GAA DS-NW JL-FETs) have been successfully fabricated and demonstrated in the category of poly-Si NW FETs for the first time. We have scaled down the NW dimension (DNW) - length (LNW) × width (WNW) × thickness (TNW) - to 80nm×13nm×3nm by novel double spacer NW (DS-NW) processes without use of electron beam (e-beam) lithography tools. GAA DS-NW JL-FETs show good electrical characteristics: near ideal subthreshold swing (S.S.) ~ 61 mV/dec., steep driving swing (D.S.) ~ 82mV/dec., and sub-1V gate operation without implantation processes for future three-dimensional integrated circuits (3-D ICs), system-on-panel (SOP) applications.","PeriodicalId":336637,"journal":{"name":"2015 IEEE International Electron Devices Meeting (IEDM)","volume":"84 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120972978","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
High-frequency, scaled MoS2 transistors 高频，缩放MoS2晶体管
2015 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2015-12-01 DOI: 10.1109/IEDM.2015.7409781
Dana Krasnozhon, S. Dutta, Clemens Nyffeler, Y. Leblebici, A. Kis
{"title":"High-frequency, scaled MoS2 transistors","authors":"Dana Krasnozhon, S. Dutta, Clemens Nyffeler, Y. Leblebici, A. Kis","doi":"10.1109/IEDM.2015.7409781","DOIUrl":"https://doi.org/10.1109/IEDM.2015.7409781","url":null,"abstract":"The interest in MoS2 for radio-frequency (RF) application has recently increased1'2. However, little is known on the scaling behavior of transistors made from MoS2 for RF applications, which is important for establishing performance limits for electronic circuits based on 2D semiconductors on flexible and rigid substrates. Here, we present a systematic study of top-gated trilayer MoS2 RF transistors with gate lengths scaled down to 70 and 40 nm. In addition, by introducing \"edge-contacted\" injection of electrons3 in trilayer MoS2 devices, we decrease the contact resistance and as a result obtain the highest cutoff frequency of 6 GHz before the de-embedding procedure and 25 GHz after the de-embedding procedure.","PeriodicalId":336637,"journal":{"name":"2015 IEEE International Electron Devices Meeting (IEDM)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117119167","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 19
Collapse-free high power InAlGaN/GaN-HEMT with 3 W/mm at 96 GHz 无坍缩高功率InAlGaN/GaN-HEMT，功率为3w /mm，频率为96 GHz
2015 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2015-12-01 DOI: 10.1109/IEDM.2015.7409659
K. Makiyama, S. Ozaki, T. Ohki, N. Okamoto, Y. Minoura, Y. Niida, Y. Kamada, K. Joshin, K. Watanabe, Y. Miyamoto
{"title":"Collapse-free high power InAlGaN/GaN-HEMT with 3 W/mm at 96 GHz","authors":"K. Makiyama, S. Ozaki, T. Ohki, N. Okamoto, Y. Minoura, Y. Niida, Y. Kamada, K. Joshin, K. Watanabe, Y. Miyamoto","doi":"10.1109/IEDM.2015.7409659","DOIUrl":"https://doi.org/10.1109/IEDM.2015.7409659","url":null,"abstract":"In this work, we demonstrated an excellent output power (Pout) density of 3.0 W/mm at 96 GHz using a novel collapse-free InAlGaN/GaN-HEMT with an 80-nm gate for a millimeter-wave amplifier. The developed devices showed basic reliability for commercial products. To eliminate the current collapse, a unique double-layer silicon nitride (SiN) passivation film that has oxidation resistance was adopted. We proved the potential of InAlGaN/GaN-HEMT using our unique device technology experimentally and analytically.","PeriodicalId":336637,"journal":{"name":"2015 IEEE International Electron Devices Meeting (IEDM)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126153424","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 55
InGaAs 3D MOSFETs with drastically different shapes formed by anisotropic wet etching 采用各向异性湿法蚀刻技术制备了形状迥异的InGaAs三维mosfet
2015 IEEE International Electron Devices Meeting (IEDM) Pub Date : 2015-12-01 DOI: 10.1109/IEDM.2015.7409702
J. Zhang, M. Si, X. Lou, W. Wu, R. Gordon, P. Ye
{"title":"InGaAs 3D MOSFETs with drastically different shapes formed by anisotropic wet etching","authors":"J. Zhang, M. Si, X. Lou, W. Wu, R. Gordon, P. Ye","doi":"10.1109/IEDM.2015.7409702","DOIUrl":"https://doi.org/10.1109/IEDM.2015.7409702","url":null,"abstract":"In this work, we report on a 3D device fabrication technology achieved by applying a novel anisotropic wet etching method. By aligning channel structures along different crystal orientations, high performance 3D InGaAs devices with different channel shapes such as fins, nanowires and waves have been demonstrated. With further optimizing off-state leakage path by barrier engineering, a record high ION/IOFF over 108 and minimum IOFF~3pA/μm have been obtained from InGaAs FinFET device. Scaling metrics for InGaAs GAA MOSFETs and FinFETs are systematically studied with Lch from 800 nm down to 50 nm and WFin/WNW from 100 nm down to 20 nm which shows an excellent immunity to short channel effects.","PeriodicalId":336637,"journal":{"name":"2015 IEEE International Electron Devices Meeting (IEDM)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126865228","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
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