Symposium on Architectures for Networking and Communications Systems最新文献

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Input-queued switches with logarithmic delay: necessary conditions and a reconfigurable scheduling algorithm 具有对数延迟的输入队列交换机:必要条件和可重构调度算法
Symposium on Architectures for Networking and Communications Systems Pub Date : 2008-11-06 DOI: 10.1145/1477942.1477961
Krishnendu Roy, R. Vaidyanathan, J. Trahan
{"title":"Input-queued switches with logarithmic delay: necessary conditions and a reconfigurable scheduling algorithm","authors":"Krishnendu Roy, R. Vaidyanathan, J. Trahan","doi":"10.1145/1477942.1477961","DOIUrl":"https://doi.org/10.1145/1477942.1477961","url":null,"abstract":"Typically, a scheduling algorithm for an <i>n</i> x <i>n</i> packet switch with a crossbar as the data fabric divides time into slots, each of duration <i>t<sub>p</sub></i> sufficient to transmit a packet. If a scheduling round requires <i>t<sub>r</sub></i> > <i>t<sub>p</sub></i> time, then the switch can transmit multiple packets, up to <i>s</i> = ⌊<i>t<sub>r</sub>/t<sub>p</sub></i>⌋, between each mapped input-output pair under the current mapping. If <i>s</i> = 1, there exists a frame-based scheduling algorithm with Θ(log <i>n</i>) delay. For uniform random traffic, we establish that the delay is Ω(<i>n</i>) for any <i>s</i> > 1, hence, <i>s</i> = 1 is the only case where a Θ(log <i>n</i>) delay is achievable.\u0000 Given the importance of achieving a low <i>s</i>, it is imperative to develop extremely fast scheduling algorithms (that reduce <i>t<sub>r</sub></i>) on a mesh-based structure (corresponding to the crossbar topology of the switch). We present results for a fast scheduling algorithm that runs on a mesh-of-trees topology that can be overlaid on the crossbar switching fabric.","PeriodicalId":329300,"journal":{"name":"Symposium on Architectures for Networking and Communications Systems","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129844509","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
On design of bandwidth scheduling algorithms for multiple data transfers in dedicated networks 专用网络中多数据传输的带宽调度算法设计
Symposium on Architectures for Networking and Communications Systems Pub Date : 2008-11-06 DOI: 10.1145/1477942.1477970
Yunyue Lin, C. Wu
{"title":"On design of bandwidth scheduling algorithms for multiple data transfers in dedicated networks","authors":"Yunyue Lin, C. Wu","doi":"10.1145/1477942.1477970","DOIUrl":"https://doi.org/10.1145/1477942.1477970","url":null,"abstract":"The significance of high-performance dedicated networks has been well recognized due to the rapidly increasing number of large-scale applications that require high-speed data transfer. Efficient algorithms are needed for path computation and bandwidth scheduling in dedicated networks to improve the utilization of network resources and meet diverse user requests. We consider two periodic bandwidth scheduling problems: multiple data transfer allocation (MDTA) and multiple fixed-slot bandwidth reservation (MFBR), both of which schedule a number of user requests accumulated in a certain period. MDTA is to assign multiple data transfer requests on several pre-specified network paths to minimize the total data transfer end time, while MFBR is to satisfy multiple bandwidth reservation requests, each of which specifies a bandwidth and a time slot. For MDTA, we design an optimal algorithm and provide its correctness proof; for MFBR, we prove it to be NP-complete and propose a heuristic algorithm, Minimal Bandwidth and Distance Product Algorithm (MBDPA). Extensive simulation results illustrate the performance superiority of the proposed MBDPA over a greedy heuristic approach and provide valuable insight into the advantage of periodic bandwidth scheduling over instant bandwidth scheduling.","PeriodicalId":329300,"journal":{"name":"Symposium on Architectures for Networking and Communications Systems","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132770529","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 26
A scalable multithreaded L7-filter design for multi-core servers 用于多核服务器的可扩展多线程l7过滤器设计
Symposium on Architectures for Networking and Communications Systems Pub Date : 2008-11-06 DOI: 10.1145/1477942.1477952
Danhua Guo, Guangdeng Liao, L. Bhuyan, B. Liu, J. Ding
{"title":"A scalable multithreaded L7-filter design for multi-core servers","authors":"Danhua Guo, Guangdeng Liao, L. Bhuyan, B. Liu, J. Ding","doi":"10.1145/1477942.1477952","DOIUrl":"https://doi.org/10.1145/1477942.1477952","url":null,"abstract":"L7-filter is a significant component in Linux's QoS framework that classifies network traffic based on application layer data. It enables subsequent distribution of network resources in respect to the priority of applications. Considerable research has been reported to deploy multi-core architectures for computationally intensive applications. Unfortunately, the proliferation of multi-core architectures has not helped fast packet processing due to: 1) the lack of efficient parallelism in legacy network programs, and 2) the non-trivial configuration for scalable utilization on multi-core servers.\u0000 In this paper, we propose a highly scalable parallelized L7-filter system architecture with affinity-based scheduling on a multi-core server. We start with an analytical study of the system architecture based on an offline design. Similar to Receive Side Scaling (RSS) in the NIC, we develop a model to explore the connection level parallelism in L7-filter and propose an affinity-based scheduler to optimize system scalability. Performance results show that our optimized L7-filter has superior scalability over the naive multithreaded version. It improves system performance by about 50% when all the cores are deployed.","PeriodicalId":329300,"journal":{"name":"Symposium on Architectures for Networking and Communications Systems","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116970545","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 54
On runtime management in multi-core packet processing systems 多核包处理系统的运行时管理
Symposium on Architectures for Networking and Communications Systems Pub Date : 2008-11-06 DOI: 10.1145/1477942.1477953
Qiang Wu, T. Wolf
{"title":"On runtime management in multi-core packet processing systems","authors":"Qiang Wu, T. Wolf","doi":"10.1145/1477942.1477953","DOIUrl":"https://doi.org/10.1145/1477942.1477953","url":null,"abstract":"Computer networks require increasingly complex packet processing in the data path to adapt to new functionality requirements. To meet performance demands, packet processing systems on routers employ multiple processor cores. We investigate the design of an efficient run-time management system that handles the allocation of processing tasks to processor cores. Using run-time profiling information about processing requirements and traffic characteristics, the system is able to adapt to dynamic changes in the workload and balance the utilization of all processing resources to maximize throughput. We present a prototype implementation of our system that is based on the Click modular router. Our results show that our prototype system can adapt to changing workloads and process computationally demanding packets at 1.32 times higher data rates than SMP Click.","PeriodicalId":329300,"journal":{"name":"Symposium on Architectures for Networking and Communications Systems","volume":"151 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122627515","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 33
Stateful hardware decompression in networking environment 网络环境下有状态硬件解压缩
Symposium on Architectures for Networking and Communications Systems Pub Date : 2008-11-06 DOI: 10.1145/1477942.1477968
Hao Yu, H. Franke, G. Biran, Amit Golander, T. Nelms, B. Bass
{"title":"Stateful hardware decompression in networking environment","authors":"Hao Yu, H. Franke, G. Biran, Amit Golander, T. Nelms, B. Bass","doi":"10.1145/1477942.1477968","DOIUrl":"https://doi.org/10.1145/1477942.1477968","url":null,"abstract":"Compression and Decompression can significantly lower the network bandwidth requirements for common internet traffic. Driven by the demands of an enterprise network intrusion system, this paper defines and examines the requirements of popular dictionary-based decompression in the real-time network processing scenario. In particular, a \"stateful\" decompression is required that arises out of the packet oriented nature of current networks, where the decompression of the data of a packet depends on the decompressed contents of its preceeding packets composing the same data stream. We propose an effective hardware decompression acceleration engine, which fetches the history data into the accelerator's fast memory on-demand and hides the associated latency by exploring the parallelism of the dictionary-based decompression process. We specify and evaluate various design and implementation options of the fetch-on-demand mechanism, i.e. prefetch most frequently used history, on-accelerator history buffer management, and reuse of fetched history data. Through simulation-based performance study, we show the effectiveness of the proposed mechanism on hiding the overhead of stateful decompression. We further show the effects of the design options and the impact on the overall performance of the network service stack of an intrusion prevension system.","PeriodicalId":329300,"journal":{"name":"Symposium on Architectures for Networking and Communications Systems","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125082699","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Towards effective network algorithms on multi-core network processors 多核网络处理器上有效的网络算法研究
Symposium on Architectures for Networking and Communications Systems Pub Date : 2008-11-06 DOI: 10.1145/1477942.1477963
Yaxuan Qi, Zongwei Zhou, Baohua Yang, Fei He, Y. Xue, Jun Li
{"title":"Towards effective network algorithms on multi-core network processors","authors":"Yaxuan Qi, Zongwei Zhou, Baohua Yang, Fei He, Y. Xue, Jun Li","doi":"10.1145/1477942.1477963","DOIUrl":"https://doi.org/10.1145/1477942.1477963","url":null,"abstract":"To build high-performance network devices with holistic security protection, a large number of algorithms have been proposed. However, multi-core implementation of the existing algorithms suffers from three limitations: performance instability, data-structure heterogeneity, and hardware dependency. In this paper, we propose three principles for effective network processing on multi-core network processors. To verify the effectiveness of these principles, algorithms for two typical network processing tasks are redesigned and implemented on the Cavium Octeon3860 network processor. Test results show that our schemes achieve superior performance in comparison with existing best-known algorithms.","PeriodicalId":329300,"journal":{"name":"Symposium on Architectures for Networking and Communications Systems","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127525743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
Data path credentials for high-performance capabilities-based networks 基于高性能功能的网络的数据路径凭据
Symposium on Architectures for Networking and Communications Systems Pub Date : 2008-11-06 DOI: 10.1145/1477942.1477965
T. Wolf
{"title":"Data path credentials for high-performance capabilities-based networks","authors":"T. Wolf","doi":"10.1145/1477942.1477965","DOIUrl":"https://doi.org/10.1145/1477942.1477965","url":null,"abstract":"Capabilities-based networks present a fundamental shift in the security design of network architectures. Instead of permitting the transmission of packets from any source to any destination, routers deny forwarding by default. For a successful transmission, packets need to positively identify themselves and their permissions to the router. The analysis of the data path credentials data structure that we propose shows that as few as 128 bits are sufficient to reduce the probability of unauthorized traffic reaching its destination to a fraction of a percent.","PeriodicalId":329300,"journal":{"name":"Symposium on Architectures for Networking and Communications Systems","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127573540","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 32
Acceleration of decision tree searching for IP traffic classification 为 IP 流量分类加速决策树搜索
Symposium on Architectures for Networking and Communications Systems Pub Date : 2008-11-06 DOI: 10.1145/1477942.1477949
Yan Luo, Ke Xiang, Sanping Li
{"title":"Acceleration of decision tree searching for IP traffic classification","authors":"Yan Luo, Ke Xiang, Sanping Li","doi":"10.1145/1477942.1477949","DOIUrl":"https://doi.org/10.1145/1477942.1477949","url":null,"abstract":"Traffic classification remains a hot research problem, especially when facing new traffic trends and new hardware architectures. We propose a classification tree search method called explicit range search, motivated by the characteristics of machine learning based classification approaches. Our method differs from previously known algorithms such as HiCut and HyperCut in how to cut the ranges within a dimension and how to search within the ranges. By storing explicit marks and performing hardware supported parallel comparison, the explicit range search can reduce the worst-case number of memory accesses from 26 to 5 on a number of realistic rule sets generated from a well-known machine learning algorithm (C4.5). We also describe in this paper the proposed design based on FPGA devices.","PeriodicalId":329300,"journal":{"name":"Symposium on Architectures for Networking and Communications Systems","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127481519","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 38
SimNP: a flexible platform for the simulation of a network processing system SimNP:一个灵活的模拟网络处理系统的平台
Symposium on Architectures for Networking and Communications Systems Pub Date : 2008-11-06 DOI: 10.1145/1477942.1477962
D. Bermingham, Liu Zhen, Xiaojun Wang
{"title":"SimNP: a flexible platform for the simulation of a network processing system","authors":"D. Bermingham, Liu Zhen, Xiaojun Wang","doi":"10.1145/1477942.1477962","DOIUrl":"https://doi.org/10.1145/1477942.1477962","url":null,"abstract":"In this paper we present an open source flexible network processor simulation framework called SimNP. Allowing algorithms and applications to be implemented in high level languages such as C or C++, SimNP allows workload characterization, architecture development and performance evaluation. The simulator models several architectural features that are commonly employed by network processors, including multiple processing cores, integrated networking interface and memory controller, and hardware accelerators. Moreover, new features or new modules can also be easily added into this simulator.","PeriodicalId":329300,"journal":{"name":"Symposium on Architectures for Networking and Communications Systems","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128771949","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Implementing an OpenFlow switch on the NetFPGA platform 在NetFPGA平台上实现OpenFlow交换机
Symposium on Architectures for Networking and Communications Systems Pub Date : 2008-11-06 DOI: 10.1145/1477942.1477944
Jad Naous, David Erickson, Adam Covington, G. Appenzeller, N. McKeown
{"title":"Implementing an OpenFlow switch on the NetFPGA platform","authors":"Jad Naous, David Erickson, Adam Covington, G. Appenzeller, N. McKeown","doi":"10.1145/1477942.1477944","DOIUrl":"https://doi.org/10.1145/1477942.1477944","url":null,"abstract":"We describe the implementation of an OpenFlow Switch on the NetFPGA platform. OpenFlow is a way to deploy experimental or new protocols in networks that carry production traffic. An OpenFlow network consists of simple flow-based switches in the datapath, with a remote controller to manage several switches. In practice, OpenFlow is most often added as a feature to an existing Ethernet switch, IPv4 router or wireless access point. An OpenFlow-enabled device has an internal flow-table and a standardized interface to add and remove flow entries remotely.\u0000 Our implementation of OpenFlow on the NetFPGA is one of several reference implementations we have implemented on different platforms. Our simple OpenFlow implementation is capable of running at line-rate and handling all the traffic that is going through the Stanford Electrical Engineering and Computer Science building. We compare our implementation's complexity to a basic IPv4 router implementation and a basic Ethernet learning switch implementation. We describe the OpenFlow deployment into the Stanford campus and the Internet2 backbone.","PeriodicalId":329300,"journal":{"name":"Symposium on Architectures for Networking and Communications Systems","volume":"104 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115795085","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 275
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