{"title":"The architecture of a database computer - a summary","authors":"D. K. Hsiao, K. Kannan","doi":"10.1145/800180.810250","DOIUrl":"https://doi.org/10.1145/800180.810250","url":null,"abstract":"The motivation for seeking hardware solutions to database management functions traditionally carried out by software has been apparent to data-base designers for sometime now. Firstly, database management software has grown in complexity and size over the years. This growth is prompted by the increase in user requirements, by the formulation of sophisticated models and by the change in data processing mode from an off-line, batched, single user environment to an on-line, concurrent and multi-user environment. Large and complex software systems tend to be failure-prone. Further-more, practical verification methods for software systems are still not in sight. On the other hand, methods for verifying hardware functionality, design and production have long been available. Advanced technology has also overcome some of the problems of the logic complexity and capacity requirements, making the construction of relatively large and complex computers viable. By incorporating basic database management functions into hardware, not only can we provide more reliable basic functions, but we can also improve the software reliability since the software requirements will be less complex and the system software will be smaller in size.","PeriodicalId":328859,"journal":{"name":"Computer Architecture Workshop","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126770405","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"The data management machine, a classification","authors":"R. Rosenthal","doi":"10.1145/800180.810251","DOIUrl":"https://doi.org/10.1145/800180.810251","url":null,"abstract":"There has been much interest in the use of special purpose processors as the data base management component of data processing systems. The generic terms “backend” and “data management machine” have been applied to such devices. Examination of the literature reveals a broad cross section of host to backend functional distribution and interconnection methodology. This discussion represents an attempt to examine and classify several of these backend data base management machine configurations in terms of their operational parameters and application constraints. A formal taxonomy of such systems remains yet to be performed.\u0000 At least three distinct classes of data management machine (DMM) are evidenced in the literature; they are the large host backend, distributed network data node and smart peripheral. The intended classes of problem that the various authors envision amenable to solution by the DMM approach exhibit overlap while the performance envelope in which each DMM architecture would provide a technically acceptable, economically sound solution to a given user requirement set varies. Some of the papers used as source for this work contained no explicit mention of either the problem classes or performance constraints that the described configuration was to address; thus liberty has been taken in interpreting the implicit application goals of these authors.","PeriodicalId":328859,"journal":{"name":"Computer Architecture Workshop","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122611683","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A comparison of sequential and associate computing of priority queues","authors":"Barry M. Landson, R. Sargent","doi":"10.1145/800180.810255","DOIUrl":"https://doi.org/10.1145/800180.810255","url":null,"abstract":"A comparison of priority queues on four different types of computer memories are made by ring a model to determine the total time to do comparable tasks. The four types of memories compared are random access (RAM), associate (AM), hybrid consisting of an associate memory and a random access memory (AM/RAM), and the hybrid memory with an auxiliary memory having the @@@@pability to perform Lewin's Associate algorithm @@@@], (AM/RAM/AML).\u0000 The model used for the comparisons is an extension of the MIX model developed by Knuth [1]. The MIX model was extended to include the four types of memories and the instruction set expanded include @@@@ instructions for the memories added. This @@del allows direct comparisons to be made of the different architectures and different software algorithms in performing the same tasks.","PeriodicalId":328859,"journal":{"name":"Computer Architecture Workshop","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127928425","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Microprocessors for non-numeric processing","authors":"S. Zaky","doi":"10.1145/800180.810249","DOIUrl":"https://doi.org/10.1145/800180.810249","url":null,"abstract":"The problem of processing of non-numeric data has received considerable attention in the last few years. This is primarily motivate by the pressing needs in the are a of data base management. It has long been recognized that the parallel processing capabilities of an associative processor are fundamentally well suited to this environment. However, the complexity and cost of truely associative memories make this approach impractical. In this paper, the demands that non-numeric processing place on memory and processor hardware are discussed. Some emerging trends are presented, and a suggestion is given regarding the development of a “general purpose” microprocessor that is suited to this environment.\u0000 Basically, the microprocessor discussed here is capable of performing simple search and update functions on a high speed, serial data stream. Therefore, it is suited to any application where such a situation is encountered, such as in digital communications.","PeriodicalId":328859,"journal":{"name":"Computer Architecture Workshop","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123554446","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Implementation of character string pattern matching on a multiprocessor","authors":"Maniel Vineberg","doi":"10.1145/800180.810246","DOIUrl":"https://doi.org/10.1145/800180.810246","url":null,"abstract":"An algorithm to do pattern matching, a basic character string operation, is presented. The Programmable Algorithm Machine (PAM), a proposed special-purpose computer which will feature multiple processing elements and operate efficiently over a wide class of applications, is described. It is shown that the multiple processing elements of the PAM allow concurrent execution of independent operations both in a special case of the pattern matching algorithm, where the string sizes (lengths) are known at compile time, and in the general case, where the sizes are not known.","PeriodicalId":328859,"journal":{"name":"Computer Architecture Workshop","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131400690","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A machine for information retrieval","authors":"A. Masri, J. Rohmer, D. Tusera","doi":"10.1145/800128.804176","DOIUrl":"https://doi.org/10.1145/800128.804176","url":null,"abstract":"The described machine was conceived especially for nonnumeric computation. The possible applications are: - content and structures recognition in texts - language translation - modification of files format - etc... The first application of the machine will be “A library file query system”. The library file is available on a 300 Mbyte disk. The proposed query language allows to ask questions which may be rather imprecise (with spelling mistakes or with missing words in sentences) and complicated with predicates containing logical expressions about the existence of words or words sequences.","PeriodicalId":328859,"journal":{"name":"Computer Architecture Workshop","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125749179","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Trends in non-software support for input-output functions","authors":"Ken J. McDonell","doi":"10.1145/800180.810252","DOIUrl":"https://doi.org/10.1145/800180.810252","url":null,"abstract":"Input-output subsystem architectures have evolved over the past 20-odd years to the point where two divergent approaches have found acceptance in current computer systems; the 'IBM channel' is the archetype of the lower level alternative, while the functionally more complex techniques involve a wide spectrum of distributed processor architectures supporting database and/or storage management functions independently with respect to the central processor. The paper traces the historical development of support (outside central processor based software) for input-output functions and concludes with a preliminary comparison of the relative merits of the software interfaces provided by the alternative input-output subsystem architectures.","PeriodicalId":328859,"journal":{"name":"Computer Architecture Workshop","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114784315","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A Proposal for a Hardware Text Processor","authors":"A. Mukhopadhyay","doi":"10.1145/647003.711743","DOIUrl":"https://doi.org/10.1145/647003.711743","url":null,"abstract":"","PeriodicalId":328859,"journal":{"name":"Computer Architecture Workshop","volume":"354 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132415232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"On imaginary fields, token transfers and floating codes in intelligent secondary memories","authors":"G. Lipovski","doi":"10.1145/800180.810248","DOIUrl":"https://doi.org/10.1145/800180.810248","url":null,"abstract":"In analyzing two implemented intelligent secondary memories, CASSM and RAP, we recognize a common mechanism which is here called an imaginary field. The mechanism can be generalized to suggest further design possibilities. It further explains the complex and controversial CASSM mechanism, “pointer transfer” in terms of separate but related principles—imaginary fields, token transfers, and floating codes—such that further designs can utilize some or all of the techniques.","PeriodicalId":328859,"journal":{"name":"Computer Architecture Workshop","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124707627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"SYNGLISH - a high level query language for the RAP database machine","authors":"Tamer M. Ozso, E. Ozkarahan","doi":"10.1145/800083.802704","DOIUrl":"https://doi.org/10.1145/800083.802704","url":null,"abstract":"This paper describes a high-level query language developed and implemented for the RAP database machine. The language, called SYNGLISH, is based on the semantic structure of the English sentences. The software system developed accepts SYNGLISH queries and produces RAP assembler code which is then executed by the RAP software emulator.","PeriodicalId":328859,"journal":{"name":"Computer Architecture Workshop","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134556077","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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