{"title":"A Unified Trace Environment for IBM SP systems","authors":"C. Wu, H. Franke, Yew-Huey Liu","doi":"10.1109/M-PDT.1996.494613","DOIUrl":"https://doi.org/10.1109/M-PDT.1996.494613","url":null,"abstract":"C. Eric Wu, Hubertus Franke, and Yew-Huey Liu IBM T J. Watson Research Center Distributed parallel processing can increase system computing power beyond the limits of current uniprocessor technology. However, programming in such a system based on the message-passing programming model is much more complex than writing sequential programs. To take advantage of the underlying hardware, understanding the communication behavior of parallel programs and system responses to user applications is extremely critical. One common way of monitoring a program’s behavior is to generate trace events while executing the program. Events generated can then be used for other purposes such as debugging and program visualization. However, as we’ll see, such a method potentially requires source code modification, increases overhead, and causes clocksynchronization problems. T o meet these challenges, we developed a Unified Trace Environment for IBM SP systems. The user-level U T E trace libraries require only relinking for generating message-passing and system events. With the UTE, users can generate message-passing events with minimum overhead, and mark specific portions of the program, such as various phases, loops, and routines, for performance analysis and visualization. Most user-level trace tools for messagepassing systems require source code modification to collect message-passing events. More advanced tools such as the Paradyn systeml require no source code modification; they insert the code for performance instrumentation into an application program during execution. However, instrumentation daemons cause substantial overhead. Collecting system events is as important as collecting message-passing events. System and I/O events such as process dispatch and page fault can reveal crucial information on system responses to user applications. The trace facility should also easily expand to trace activities from other software layers, such as parallel I/O file systems and high-level parallel languages. Such expandability enables the same trace facility to trace multiple software systems. One of the most serious problems in trace analysis for distributed parallel systems is clock synchronization. In such a system, multiple processors generate trace records, and often multiple nodes produce separate streams independently. The logical order of events might not be guaranteed in the trace because of discrepancies among local clocks. As a result, many trace facilities must do additional work to ensure consistent time stamps, thus increasing trace overhead. The challenges of trace analysis","PeriodicalId":325213,"journal":{"name":"IEEE Parallel & Distributed Technology: Systems & Applications","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125388148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Advances in distributed sensor technology","authors":"J. D. Cavin","doi":"10.1109/MPDT.1996.7102340","DOIUrl":"https://doi.org/10.1109/MPDT.1996.7102340","url":null,"abstract":"Advances in Distributed Sensor Technology by S.S. Iyengar, L. Prasad, and Hla Min 273 pp. $68 Prentice Hall Upper Saddle River, N.J. 1995 ISBN 0-13-360033-5","PeriodicalId":325213,"journal":{"name":"IEEE Parallel & Distributed Technology: Systems & Applications","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-01-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128385193","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Parallel architectures: Techniques for compiler-directed cache coherence","authors":"L. Choi, Hock-Beng Lim, P. Yew","doi":"10.1109/M-PDT.1996.544438","DOIUrl":"https://doi.org/10.1109/M-PDT.1996.544438","url":null,"abstract":"Compiler-directed cache coherence can help close the gap between processor and memory speed. The authors explain the concepts underlying techniques and survey various approaches to this strategy.","PeriodicalId":325213,"journal":{"name":"IEEE Parallel & Distributed Technology: Systems & Applications","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-01-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129955903","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Integrating personal computers in a distributed client-server environment","authors":"Everett Markowska-Scott","doi":"10.1109/MPDT.1996.7102338","DOIUrl":"https://doi.org/10.1109/MPDT.1996.7102338","url":null,"abstract":"Integrating Personal Computers in a Distributed Client-Server Environment edited by Raman Khanna 662 pp. $48 Prentice Hall Upper Saddle River, N.J. 1995 ISBN 0-13-305152-8","PeriodicalId":325213,"journal":{"name":"IEEE Parallel & Distributed Technology: Systems & Applications","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-01-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114067217","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Topics in advanced scientific computation","authors":"J. Zalewski, M. Pernice","doi":"10.1109/M-PDT.1996.544444","DOIUrl":"https://doi.org/10.1109/M-PDT.1996.544444","url":null,"abstract":"Topics in Advanced Scientific Computation by Richard E. Crandall 340 pp. $49 Springer-Verlag, New York Telos, Santa Clara, Calif. 1996 ISBN 0-387-94473-7","PeriodicalId":325213,"journal":{"name":"IEEE Parallel & Distributed Technology: Systems & Applications","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-01-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123135628","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Fault-tolerant computer system design","authors":"N. Jha","doi":"10.1109/MPDT.1996.7102341","DOIUrl":"https://doi.org/10.1109/MPDT.1996.7102341","url":null,"abstract":"Fault-Tolerant Computer System Design by Dhiraj K. Pradhan 550 pp. $72 Prentice Hall Upper Saddle River, N.J. 1996 ISBN 0-13-057887-8","PeriodicalId":325213,"journal":{"name":"IEEE Parallel & Distributed Technology: Systems & Applications","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-01-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121775313","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Parallel processing in cellular arrays","authors":"Albert Y. Zomaya","doi":"10.1109/MPDT.1996.7102337","DOIUrl":"https://doi.org/10.1109/MPDT.1996.7102337","url":null,"abstract":"Parallel Processing in Cellular Arrays by Yakov Fet 200 pp. $74.95 John Wiley & Sons New York 1995 ISBN 0-471-95409-8","PeriodicalId":325213,"journal":{"name":"IEEE Parallel & Distributed Technology: Systems & Applications","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-01-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125075238","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Parallel architectures: Cache memories for dataflow systems","authors":"A. Hurson, K. Kavi, B. Shirazi, Ben Lee","doi":"10.1109/88.544436","DOIUrl":"https://doi.org/10.1109/88.544436","url":null,"abstract":"Cache memory — so effective in traditional control-flow architecture — has the potential to enhance dataflow system performance as well. The authors explore the recent trend in combining dataflow and control-flow processing, which offers new alternatives in computer architecture design, and analyze cache memory's application to the dataflow environment.","PeriodicalId":325213,"journal":{"name":"IEEE Parallel & Distributed Technology: Systems & Applications","volume":"6 4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-01-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132733129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Parallel computing works!","authors":"M. Paprzycki","doi":"10.1109/MPDT.1996.7102339","DOIUrl":"https://doi.org/10.1109/MPDT.1996.7102339","url":null,"abstract":"Parallel Computing Works! by G.C. Fox, R.D. Williams, and P.C. Messina 977 pp. $69.95 Morgan Kaufmann San Francisco 1994 ISBN 1-55860-253-4","PeriodicalId":325213,"journal":{"name":"IEEE Parallel & Distributed Technology: Systems & Applications","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1996-01-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131774431","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}