2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC)最新文献

Online Management of Hybrid DRAM-NVMM Memory for HPC 高性能计算用混合DRAM-NVMM存储器的在线管理

2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC) Pub Date : 2019-12-01 DOI: 10.1109/HiPC.2019.00042

Reza Salkhordeh, A. Brinkmann

引用次数: 2

Hierarchical Filter and Refinement System Over Large Polygonal Datasets on CPU-GPU 基于CPU-GPU的大型多边形数据集分层滤波与细化系统

2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC) Pub Date : 2019-12-01 DOI: 10.1109/HiPC.2019.00027

Yiming Liu, Jie Yang, S. Puri

{"title":"Hierarchical Filter and Refinement System Over Large Polygonal Datasets on CPU-GPU","authors":"Yiming Liu, Jie Yang, S. Puri","doi":"10.1109/HiPC.2019.00027","DOIUrl":"https://doi.org/10.1109/HiPC.2019.00027","url":null,"abstract":"In this paper, we introduce our hierarchical filter and refinement technique that we have developed for parallel geometric intersection operations involving large polygons and polylines. The inputs are two layers of large polygonal datasets and the computations are spatial intersection on a pair of cross-layer polygons. These intersections are the compute-intensive spatial data analytic kernels in spatial join and map overlay computations. We have extended the classical filter and refine algorithms using PolySketch Filter to improve the performance of geospatial computations. In addition to filtering polygons by their Minimum Bounding Rectangle (MBR), our hierarchical approach explores further filtering using tiles (smaller MBRs) to increase the effectiveness of filtering and decrease the computational workload in the refinement phase. We have implemented this filter and refine system on CPU and GPU by using OpenMP and OpenACC. After using R-tree, on average, our filter technique can still discard 69% of polygon pairs which do not have segment intersection points. PolySketch filter reduces on average 99.77% of the workload of finding line segment intersections. PNP based task reduction and Striping algorithms filter out on average 95.84% of the workload of Point-in-Polygon tests. Our CPU-GPU system performs spatial join on two shapefiles, namely USA Water Bodies and USA Block Group Boundaries with 683K polygons in about 10 seconds using NVidia Titan V and Titan Xp GPU.","PeriodicalId":323735,"journal":{"name":"2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122010785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

Distributed Relational Algebra at Scale 大规模分布式关系代数

2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC) Pub Date : 2019-12-01 DOI: 10.1109/HiPC.2019.00014

Thomas Gilray, Sidharth Kumar

{"title":"Distributed Relational Algebra at Scale","authors":"Thomas Gilray, Sidharth Kumar","doi":"10.1109/HiPC.2019.00014","DOIUrl":"https://doi.org/10.1109/HiPC.2019.00014","url":null,"abstract":"Relational algebra forms a basis of primitive operations suitable for applications in graphs and networks, program analysis, deductive databases, and constraint logic programming. Despite its expressive power, relational algebra has not received the same attention in high-performance-computing research as more common primitives like stencil computations, floating-point operations, numerical integration, and sparse linear algebra. Furthermore, specific challenges in addressing representation and communication among distributed portions of a relation, especially for inherently imbalanced relations, have previously thwarted successful scaling of relational algebra applications to supercomputers. In this paper, we present a set of efficient algorithms to effectively parallelize and scale key relational algebra primitives. We introduce a hybrid hash-tree approach to representing distributed imbalanced relations and permitting efficient communication. Finally, we demonstrate the scalability of our implementation with a fixed-point algorithm computing the transitive closure of a large graph (generating over 276 billion edges) on 32,768 processes.","PeriodicalId":323735,"journal":{"name":"2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC)","volume":"249 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115013352","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 15

High-Performance Adaptive MPI Derived Datatype Communication for Modern Multi-GPU Systems 现代多gpu系统的高性能自适应MPI派生数据类型通信

2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC) Pub Date : 2019-12-01 DOI: 10.1109/HiPC.2019.00041

Ching-Hsiang Chu, J. Hashmi, Kawthar Shafie Khorassani, H. Subramoni, D. Panda

{"title":"High-Performance Adaptive MPI Derived Datatype Communication for Modern Multi-GPU Systems","authors":"Ching-Hsiang Chu, J. Hashmi, Kawthar Shafie Khorassani, H. Subramoni, D. Panda","doi":"10.1109/HiPC.2019.00041","DOIUrl":"https://doi.org/10.1109/HiPC.2019.00041","url":null,"abstract":"The recent advent of the NVLink interconnect and Peripheral Component Interconnect express (PCIe) switch has resulted in the creation of extremely dense Graphics Processing Unit (GPU) systems like Cray CS-Storm and NVIDIA DGX. In addition to the extremely high computational capability and communication capacity within a single machine, these systems expose novel capabilities like performing load-store operations from remote GPU memory across interconnects. While researchers have proposed solutions that take advantage of load-store semantics to provide support for high-performance datatype processing on CPUs, there exists no scholarly work on how one can orchestrate such high-performance datatype-based communication for GPU-resident data. In this paper, we take up this challenge and propose high-performance and architecture-aware designs for GPU-based non-contiguous datatype processing that uses the load-store semantics exposed by modern dense GPU systems. We demonstrate that the proposed solutions can reduce the overhead of datatype processing by up to 4.7X compared to the state-of-the-art schemes for GPU-based MILC communication kernel on an NVLink2-enabled dense GPU system. For a weather forecast application kernel, the proposed designs demonstrate up to 9.9X faster HaloExchange kernel among 64 GPUs over state-of-the-art designs. The proposed adaptive scheme also reports 10% higher throughput than existing designs for a 2D Jacobi solver on 16 GPUs. To the best of our knowledge, this is the first scholarly work that takes advantage of the zero-copy based load-store semantics to perform high-performance GPU to GPU derived datatype communication on modern dense GPU systems.","PeriodicalId":323735,"journal":{"name":"2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131959289","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 6

Designing a Profiling and Visualization Tool for Scalable and In-depth Analysis of High-Performance GPU Clusters 设计一个分析和可视化工具，用于高性能GPU集群的可扩展和深入分析

2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC) Pub Date : 2019-12-01 DOI: 10.1109/HiPC.2019.00022

Pouya Kousha, B. Ramesh, K. Suresh, Ching-Hsiang Chu, Arpan Jain, Nick Sarkauskas, H. Subramoni, D. Panda

{"title":"Designing a Profiling and Visualization Tool for Scalable and In-depth Analysis of High-Performance GPU Clusters","authors":"Pouya Kousha, B. Ramesh, K. Suresh, Ching-Hsiang Chu, Arpan Jain, Nick Sarkauskas, H. Subramoni, D. Panda","doi":"10.1109/HiPC.2019.00022","DOIUrl":"https://doi.org/10.1109/HiPC.2019.00022","url":null,"abstract":"The recent advent of advanced fabrics like NVIDIA NVLink is enabling the deployment of dense Graphics Processing Unit (GPU) systems, e.g., DGX-2 and Summit. The Message Passing Interface (MPI) has been the dominant programming model to design distributed applications on such clusters. The MPI Tools Interface (MPI_T) provides an opportunity for performance tools and external software to introspect and understand MPI runtime behavior at a deeper level to detect performance and scalability issues. However, the lack of low-overhead and scalable monitoring tools have thus far prevented a comprehensive study of efficiency and utilization of high-performance interconnects such as NVLinks on high-performance GPU-enabled clusters. In this paper, we address this deficiency by proposing and designing an in-depth, real-time analysis, profiling, and visualization tool for high-performance GPU-enabled clusters with NVLinks. The proposed tool builds on the top of the OSU InfiniBand Network Analysis and Monitoring Tool (INAM). It provides insights into the efficiency of different communication patterns by examining the utilization of underlying GPU interconnects. The contributions of the proposed tool are two-fold: 1) domain scientists and system administrators can understand how applications and runtime libraries interact with underlying high-performance interconnects, and 2)Proposed tool enables designers of high-performance communication libraries to gain low-level knowledge to optimize existing designs and develop new algorithms to optimally utilize cutting-edge interconnects on GPU clusters. To the best of our knowledge, this is the first such tool which is capable of presenting a unified and holistic view of MPI-level and fabric level information for emerging NVLink-enabled high-performance GPU clusters.","PeriodicalId":323735,"journal":{"name":"2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC)","volume":"156 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132194630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 9

Data Flow Execution Models — A Third Opinion 数据流执行模型——第三种观点

2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC) Pub Date : 2019-12-01 DOI: 10.1109/HiPC.2019.00012

Vivek Sarkar

引用次数: 0

IsoKV: An Isolation Scheme for Key-Value Stores by Exploiting Internal Parallelism in SSD IsoKV:一种利用SSD内部并行性的键值存储隔离方案

2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC) Pub Date : 2019-12-01 DOI: 10.1109/HiPC.2019.00039

Heerak Lim, Hwajung Kim, Kihyeon Myung, H. Yeom, Yongseok Son

{"title":"IsoKV: An Isolation Scheme for Key-Value Stores by Exploiting Internal Parallelism in SSD","authors":"Heerak Lim, Hwajung Kim, Kihyeon Myung, H. Yeom, Yongseok Son","doi":"10.1109/HiPC.2019.00039","DOIUrl":"https://doi.org/10.1109/HiPC.2019.00039","url":null,"abstract":"Modern data centers aim to take advantage of high parallelism in storage devices for I/O intensive applications such as storage servers, cache systems, and key-value stores. Key-value stores are the most typical applications that should provide a highly reliable service with high-performance. To increase the I/O performance of key-value stores, many data centers have actively adopted next-generation storage devices such as Non-Volatile Memory Express (NVMe) based Solid State Devices (SSDs). NVMe SSDs and its protocol are characterized to provide a high degree of parallelism. However, they may not guarantee predictable performance while providing high performance and parallelism. For example, heavily mixed read and write requests can result in performance degradation of throughput and response time due to the interference between the requests and internal operations (e.g., Garbage Collection (GC)). To minimize the interference and provide higher performance, this paper presents IsoKV, an isolation scheme for key-value stores by exploiting internal parallelism in SSDs. IsoKV manages the level of parallelism of SSD directly by running application-driven flash management scheme. By storing data with different characteristics in each dedicated internal parallel units of SSD, IsoKV reduces interference between I/O requests. Also, IsoKV synchronizes the LSM-tree logic and data management in SSD to eliminate GC. We implement IsoKV on RocksDB and evaluate it using Open-Channel SSD. Our extensive experiments have shown that IsoKV improves overall throughput and response time on average 1.20× and 43% compared with the existing scheme, respectively.","PeriodicalId":323735,"journal":{"name":"2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125913083","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

User-Level Scheduled Communications for MPI 用于MPI的用户级预定通信

2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC) Pub Date : 2019-12-01 DOI: 10.1109/HiPC.2019.00043

Derek Schafer, S. Ghafoor, Daniel Holmes, M. Ruefenacht, A. Skjellum

{"title":"User-Level Scheduled Communications for MPI","authors":"Derek Schafer, S. Ghafoor, Daniel Holmes, M. Ruefenacht, A. Skjellum","doi":"10.1109/HiPC.2019.00043","DOIUrl":"https://doi.org/10.1109/HiPC.2019.00043","url":null,"abstract":"Composability is one of seven reasons for the long-standing and continuing success of MPI. Extending MPI by composing its operations with user-level operations provides useful integration with the progress engine and completion notification methods of MPI. However, the existing extensibility mechanism in MPI (generalized requests) is not widely utilized and has significant drawbacks. MPI can be generalized via scheduled communication primitives, for example, by utilizing implementation techniques from existing MPI-3 nonblocking collectives and from forthcoming MPI-4 persistent and partitioned APIs. Non-trivial schedules are used internally in some MPI libraries; but, they are not accessible to end-users. Message-based communication patterns can be built as libraries on top of MPI. Such libraries can have comparable implementation maturity and potentially higher performance than MPI library code, but do not require intimate knowledge of the MPI implementation. Libraries can provide performance-portable interfaces that cross MPI implementation boundaries. The ability to compose additional user-defined operations using the same progress engine benefits all kinds of general purpose HPC libraries. We propose a definition for MPI schedules: a user-level programming model suitable for creating persistent collective communication composed with new application-specific sequences of user-defined operations managed by MPI and fully integrated with MPI progress and completion notification. The API proposed offers a path to standardization for extensible communication schedules involving user-defined operations. Our approach has the potential to introduce event-driven programming into MPI (beyond the tools interface), although connecting schedules with events comprises future work. Early performance results described here are promising and indicate strong overlap potential.","PeriodicalId":323735,"journal":{"name":"2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124520475","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Acceleration of Sparse Vector Autoregressive Modeling Using GPUs 基于gpu的稀疏向量自回归建模加速

2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC) Pub Date : 2019-12-01 DOI: 10.1109/HiPC.2019.00029

S. Venkataramanan, R. Garg, Yogish Sabharwal

{"title":"Acceleration of Sparse Vector Autoregressive Modeling Using GPUs","authors":"S. Venkataramanan, R. Garg, Yogish Sabharwal","doi":"10.1109/HiPC.2019.00029","DOIUrl":"https://doi.org/10.1109/HiPC.2019.00029","url":null,"abstract":"Autoregressive modeling is a standard approach to mathematically describe the behavior of a time series. The vector autoregressive model (VAR) describes the behavior of multiple time series. The VAR modeling is a fundamental approach which has applications in multiple domains such as time series forecasting, Granger causality, system identification and stochastic control. Solving high dimensional VAR model requires the use of sparse regression techniques from machine learning. Efficient algorithms to solve the sparse regression problems are too slow to be useful in solving large high dimensional sparse VAR modeling problems. Earlier application of sparse VAR modeling in the neuroimaging domain required the use of the IBMs Blue Gene supercomputers. In this paper we describe an approach to accelerate large scale sparse VAR problems when solved using the lasso regression algorithm on state-of-the-art GPUs. Our accelerated implementation on NVIDIA GTX 1080 GPU takes a few seconds to solve the problem, reaching up to 4 TFLOPs of single-precision performance which is close to 55% of its peak matrix-multiply (GEMM) performance.","PeriodicalId":323735,"journal":{"name":"2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132437631","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Replaceability Based Web Service Selection Approach 基于可替换性的Web服务选择方法

2019 IEEE 26th International Conference on High Performance Computing, Data, and Analytics (HiPC) Pub Date : 2019-12-01 DOI: 10.1109/HiPC.2019.00024

Dr. Lalit Purohit, Sandeep Kumar

引用次数: 3