2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC)最新文献

Toward the Design of a Novel Wearable System for Field Research in Ecology 一种新型生态学野外研究可穿戴系统的设计

2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC) Pub Date : 2018-11-01 DOI: 10.1109/SBESC.2018.00031

Mateus Silva, S. Delabrida, S. Ribeiro, Ricardo A. O. Oliveira

引用次数: 6

[Title page i] [标题页i]

2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC) Pub Date : 2018-11-01 DOI: 10.1109/sbesc.2018.00001

引用次数: 0

[Copyright notice] (版权)

2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC) Pub Date : 2018-11-01 DOI: 10.1109/sbesc.2018.00003

引用次数: 0

Designing a Novel Dataset for Non-intrusive Load Monitoring 设计一种新的非侵入式负载监测数据集

2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC) Pub Date : 2018-11-01 DOI: 10.1109/SBESC.2018.00045

D. Renaux, R. Linhares, Fabiana Pöttker, A. Lazzaretti, C. Lima, Adil Coelho Neto, Mateus Campaner

{"title":"Designing a Novel Dataset for Non-intrusive Load Monitoring","authors":"D. Renaux, R. Linhares, Fabiana Pöttker, A. Lazzaretti, C. Lima, Adil Coelho Neto, Mateus Campaner","doi":"10.1109/SBESC.2018.00045","DOIUrl":"https://doi.org/10.1109/SBESC.2018.00045","url":null,"abstract":"Non-intrusive Load Monitoring (NILM) is a technology that allows the identification of individual electrical loads from a single aggregated measurement of voltage/current, hence, useful for diagnostic of the consumption of electrical energy. This is performed by means of load detection and disaggregation techniques, as there are several different power signatures from the active loads. In order to develop more precise and efficient strategies and algorithms for load detection and disaggregation, several efforts have been made to build datasets that represent different scenarios of combined power loads and the events that cause changes in their states, such as power on and power off. The research presented here shows the conception of a new dataset for NILM research, from the analysis of the limitations of existing datasets, as well as the development and evaluation of a data collecting jig that is being used to collect this dataset. As a result, the infrastructure has been set up to build the LIT dataset, which is expected to provide the NILM field of study with more precise data for power signature analysis.","PeriodicalId":323489,"journal":{"name":"2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC)","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131465800","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 13

Development of a Wireless Current Measurement Sensor Node for IoT Applications 面向物联网应用的无线电流测量传感器节点的开发

2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC) Pub Date : 2018-11-01 DOI: 10.1109/SBESC.2018.00010

I. Müller, Thiago Companhoni, M. Götz, C. P. Souza

引用次数: 0

Automatic Tuning TLP and DVFS for EDP with a Non-intrusive Genetic Algorithm Framework 基于非侵入式遗传算法框架的EDP TLP和DVFS自动调优

2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC) Pub Date : 2018-11-01 DOI: 10.1109/SBESC.2018.00029

C. C. D. Oliveira, A. Lorenzon, A. C. S. Beck

{"title":"Automatic Tuning TLP and DVFS for EDP with a Non-intrusive Genetic Algorithm Framework","authors":"C. C. D. Oliveira, A. Lorenzon, A. C. S. Beck","doi":"10.1109/SBESC.2018.00029","DOIUrl":"https://doi.org/10.1109/SBESC.2018.00029","url":null,"abstract":"New applications have been pushing multithreaded processing to another level of performance and energy requirements. However, many aspects prevent linear improvements when exploiting Thread-level parallelism (TLP), which means that not always using the maximum number of available cores running at the highest possible operating frequency will deliver the best performance or energy consumption. Therefore, it is possible to improve these non-functional requirements by tuning the number of threads and the Dynamic Voltage and Frequency Scaling (DVFS) of the processor. However, applications with distinct behaviors comprise many parallel regions, which will be executed on systems with a different number of cores that run within a large range of operating frequencies. Given this exponential behavior, such problem cannot be efficiently solved by any exhaustive search method. In this scenario, this work proposes to use a Genetic Algorithm to statically find the best configuration for any OpenMP parallel application, aiming to optimize performance and energy. Our framework is totally non-intrusive, which means that the design space exploration can be performed without any changes to the source or binary codes, so even already compiled code can be optimized. Considering eight benchmarks, we improve EDP by 20.4% on average.","PeriodicalId":323489,"journal":{"name":"2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC)","volume":"62 9","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113944336","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Applying Non-destructive Testing and Machine Learning to Ceramic Tile Quality Control 无损检测和机器学习在瓷砖质量控制中的应用

2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC) Pub Date : 2018-11-01 DOI: 10.1109/SBESC.2018.00017

Renan Cunha, Rodrigo Maciel, G. Nandi, Marina Daros, Joice Cardoso, Leonardo Francis, V. Ramos, R. Marcelino, A. A. Fröhlich, G. Araújo

{"title":"Applying Non-destructive Testing and Machine Learning to Ceramic Tile Quality Control","authors":"Renan Cunha, Rodrigo Maciel, G. Nandi, Marina Daros, Joice Cardoso, Leonardo Francis, V. Ramos, R. Marcelino, A. A. Fröhlich, G. Araújo","doi":"10.1109/SBESC.2018.00017","DOIUrl":"https://doi.org/10.1109/SBESC.2018.00017","url":null,"abstract":"One of the requirements of the Industry 4.0 is the concern about the stability of its product development. Applying emerging technologies to improve product quality control is a significant step in achieving balance in the production process. The acoustic emission is a highly efficient technique used in industry to test products to detect structural failures. This type of method is well known as non-destructive testing. We assert that quality control of the products can be significantly improved by combining the acoustic emission with machine learning techniques. To achieve our claim, we built a dataset from ceramic tiles acoustic emission, and we model two different machine learning techniques, such as Support Vector Machine, with five distinct kernel functions, and k-Nearest Neighbors, to classify the quality of ceramic tiles. In this work, we use several ceramic tiles as the objects to be tested. To extract the features of the ceramic tiles sound, we have built a prototype to hit the ceramic tile to record the sounds. As the results shown, we obtained a high precision classification of the control quality of the ceramic tile, ranged from 95% to 99.9%, depending on the parameters set and the algorithm chosen.","PeriodicalId":323489,"journal":{"name":"2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC)","volume":"66 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133086913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

Efficient Local Memory Support for Approximate Computing 对近似计算的高效本地内存支持

2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC) Pub Date : 2018-11-01 DOI: 10.1109/SBESC.2018.00026

M. Brandalero, G. M. Malfatti, Geraldo F. Oliveira, L. D. Silveira, Larissa Rozales Gonçalves, B. C. D. Silva, L. Carro, A. C. S. Beck

{"title":"Efficient Local Memory Support for Approximate Computing","authors":"M. Brandalero, G. M. Malfatti, Geraldo F. Oliveira, L. D. Silveira, Larissa Rozales Gonçalves, B. C. D. Silva, L. Carro, A. C. S. Beck","doi":"10.1109/SBESC.2018.00026","DOIUrl":"https://doi.org/10.1109/SBESC.2018.00026","url":null,"abstract":"Given the saturation of single-threaded performance improvements in General-Purpose Processors (GPPs), novel architectural techniques are required to meet emerging demands. In this paper, we propose a generic acceleration framework for approximate algorithms that replaces computation with table look-up accesses in dedicated memories. At compile time, annotated application kernels are automatically profiled using sample inputs, and the most representative input-output mappings of each kernel are selected by using K-Means Clustering and saved in the program binary. At runtime, these mappings are loaded into dedicated look-up tables, and kernel execution is replaced by hardware execution of the Nearest-Centroid Classifier, which selects from memory the best matching output to the region. We show a comparison with a similar framework based on neural acceleration and that, under similar levels of quality, the proposed approach achieves on average three times better performance and energy with significant area savings, thus opening new opportunities for performance harvesting in approximate accelerators.","PeriodicalId":323489,"journal":{"name":"2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC)","volume":"114 30","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131912757","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Runtime Vectorization of Conditional Code and Dynamic Range Loops to ARM NEON Engine ARM NEON引擎条件码和动态范围循环的运行时矢量化

2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC) Pub Date : 2018-11-01 DOI: 10.1109/SBESC.2018.00019

M. Jordan, Tiago Knorst, J. Vicenzi, M. B. Rutzig

{"title":"Runtime Vectorization of Conditional Code and Dynamic Range Loops to ARM NEON Engine","authors":"M. Jordan, Tiago Knorst, J. Vicenzi, M. B. Rutzig","doi":"10.1109/SBESC.2018.00019","DOIUrl":"https://doi.org/10.1109/SBESC.2018.00019","url":null,"abstract":"SIMD engines are widely present in market processors aiming to improve performance of applications through Data Level Parallelism (DLP) exploitation. However, most SIMD engines rely on specific libraries and compilers to support DLP execution, which limits DLP gains since they are restricted to analyze static code. Dynamic SIMD Assembler (DSA) [8] is capable of exploiting DLP at runtime by identifying vectorizable loops to generate ARM NEON SIMD instructions. However, its DLP coverage capability is not fully exploited, since portion of code that depends on runtime information, such as dynamic range and conditional code loops are not exploited. In this work, we extend the DSA coverage by coupling the exploitation of conditional code and dynamic range loop vectorization. Results show that the proposed techniques improve the original DSA performance in 38% considering benchmarks with opportunities to exploit conditional code and dynamic range loops. In addition, the Extended DSA, besides keeping software productivity and binary compatibility, outperforms ARM compiler auto-vectorization by 12%.","PeriodicalId":323489,"journal":{"name":"2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC)","volume":"2007 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127304446","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Specification and Verification of a Multi-agent Coordination Protocol with TLA+ 基于TLA+的多智能体协调协议的规范与验证

2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC) Pub Date : 2018-11-01 DOI: 10.1109/SBESC.2018.00039

P. Y. A. Paiva, O. Saotome, C. Brandauer

引用次数: 1