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Proceedings Second International Conference on Application of Concurrency to System Design最新文献

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Exploiting stabilizers and parallelism in state space generation with the symmetry method 利用对称方法开发状态空间生成中的稳定器和并行性
Proceedings Second International Conference on Application of Concurrency to System Design Pub Date : 2001-06-25 DOI: 10.1109/CSD.2001.981778
Louise Lorentsen, L. Kristensen
{"title":"Exploiting stabilizers and parallelism in state space generation with the symmetry method","authors":"Louise Lorentsen, L. Kristensen","doi":"10.1109/CSD.2001.981778","DOIUrl":"https://doi.org/10.1109/CSD.2001.981778","url":null,"abstract":"The symmetry method is a main reduction paradigm for alleviating the state explosion problem. For large symmetry groups deciding whether two states are symmetric becomes time expensive due to the apparent high time complexity of the orbit problem. The contribution of this paper is to alleviate the negative impact of the orbit problem by the specification of canonical representatives for equivalence classes of states in Coloured Petri Nets, and by giving algorithms exploiting stabilizers and parallelism for computing the condensed state space.","PeriodicalId":310845,"journal":{"name":"Proceedings Second International Conference on Application of Concurrency to System Design","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121205278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Towards synthesis of monotonic asynchronous circuits from signal transition graphs 从信号转换图合成单调异步电路
Proceedings Second International Conference on Application of Concurrency to System Design Pub Date : 2001-06-25 DOI: 10.1109/CSD.2001.981775
N. Starodoubtsev, S. Bystrov, M. V. Goncharov, Ilya V. Klotchkov, A. Smirnov
{"title":"Towards synthesis of monotonic asynchronous circuits from signal transition graphs","authors":"N. Starodoubtsev, S. Bystrov, M. V. Goncharov, Ilya V. Klotchkov, A. Smirnov","doi":"10.1109/CSD.2001.981775","DOIUrl":"https://doi.org/10.1109/CSD.2001.981775","url":null,"abstract":"An approach to synthesis of asynchronous speed-independent circuits in monotonic logic gates (e.g. ASIC gate array library IBM SA-12E) is discussed. It is based on the normalcy conditions for STG behavioural specification, which guarantees implementability in monotonic and negative gates. The paper presents techniques for refining the STG specification to an implementable form. It is crucial that in comparison with other speed-independent synthesis methods, e.g. those in the Petrify CAD tool, this approach does not require the use of inverters with negligible delays in order to guarantee the absence of glitches or hazards in the circuits. Experiments with STG benchmarks, involving our new refinement techniques and VHDL simulation, indicate an average reduction of 28% in area and 23% in power consumption against solutions based on non-monotonic logic decomposition. These savings are more noticeable for more complex STG specifications. Such gains are however paid by an average of 6% decrease in circuit speed.","PeriodicalId":310845,"journal":{"name":"Proceedings Second International Conference on Application of Concurrency to System Design","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127930040","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
Strengths and weaknesses of genetic list scheduling for heterogeneous systems 异构系统遗传列表调度的优缺点
Proceedings Second International Conference on Application of Concurrency to System Design Pub Date : 2001-06-25 DOI: 10.1109/CSD.2001.981770
M. Grajcar
{"title":"Strengths and weaknesses of genetic list scheduling for heterogeneous systems","authors":"M. Grajcar","doi":"10.1109/CSD.2001.981770","DOIUrl":"https://doi.org/10.1109/CSD.2001.981770","url":null,"abstract":"List scheduling combined with genetic algorithms has already been shown to be a powerful approach (Grajcar, 1999,Yu-Kwong Kwok and Ahmad, 1996). We investigate the problems associated with using a list scheduler for a heterogeneous system. Furthermore, we present cases, for which most list schedulers fail to find the optimum. We propose and experimentally evaluate novel ideas avoiding it.","PeriodicalId":310845,"journal":{"name":"Proceedings Second International Conference on Application of Concurrency to System Design","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133088117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Embedding imperative synchronous languages in interactive theorem provers 在交互式定理证明中嵌入命令式同步语言
Proceedings Second International Conference on Application of Concurrency to System Design Pub Date : 2001-06-25 DOI: 10.1109/CSD.2001.981772
K. Schneider
{"title":"Embedding imperative synchronous languages in interactive theorem provers","authors":"K. Schneider","doi":"10.1109/CSD.2001.981772","DOIUrl":"https://doi.org/10.1109/CSD.2001.981772","url":null,"abstract":"We present a new way to define the semantics of imperative synchronous languages by means of separating the control and the data flow. The control flow is defined by predicates that describe entering conditions, conditions for internal moves, and termination conditions. The data flow is based on the extraction of guarded commands. This definition principle can be applied to any imperative synchronous language like Esterel or some statechart variants. Following this definition principle, we have embedded our language Quartz (an Esterel variant) in the interactive theorem prover HOL. We use this embedding for formal verification (both interactive theorem proving and symbolic model checking), program analysis, reasoning about the language at a meta-level and verified code generation (formal synthesis).","PeriodicalId":310845,"journal":{"name":"Proceedings Second International Conference on Application of Concurrency to System Design","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125778315","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 62
A Petri net meta-model to develop software components for embedded systems 开发嵌入式系统软件组件的Petri网元模型
Proceedings Second International Conference on Application of Concurrency to System Design Pub Date : 2001-06-25 DOI: 10.1109/CSD.2001.981769
R. J. Machado, J. Fernandes
{"title":"A Petri net meta-model to develop software components for embedded systems","authors":"R. J. Machado, J. Fernandes","doi":"10.1109/CSD.2001.981769","DOIUrl":"https://doi.org/10.1109/CSD.2001.981769","url":null,"abstract":"This paper presents a new Petri net (PN) meta-model, called shobi-PN v2.0, that can be used to specify, the dynamic behaviour of concurrent systems, using object-oriented modelling concepts together with a generalised arc set capable of coping with the complexity of the current embedded systems. This new Petri net meta-model can also be used to support a component-based development approach in the design of generic and parametrisable control-oriented software components for embedded systems.","PeriodicalId":310845,"journal":{"name":"Proceedings Second International Conference on Application of Concurrency to System Design","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114421167","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 16
Software implementation of synchronous programs 软件实现同步程序
Proceedings Second International Conference on Application of Concurrency to System Design Pub Date : 2001-06-25 DOI: 10.1109/CSD.2001.981771
C. André, Frédéric Boulanger, A. Girault
{"title":"Software implementation of synchronous programs","authors":"C. André, Frédéric Boulanger, A. Girault","doi":"10.1109/CSD.2001.981771","DOIUrl":"https://doi.org/10.1109/CSD.2001.981771","url":null,"abstract":"Synchronous languages allow a high level, concurrent, and deterministic description of the behavior of reactive systems. Thus, they can be used advantageously for the programming of embedded control systems. The runtime requirements of synchronous code are light, but several critical properties must be fulfilled. In this paper, we address the problem of the software implementation of synchronous programs. After a brief introduction to reactive systems, this paper formalizes the notion of \"execution machine\" for synchronous code. Then, a generic architecture for centralized execution machines is introduced. Finally, several effective implementations are presented.","PeriodicalId":310845,"journal":{"name":"Proceedings Second International Conference on Application of Concurrency to System Design","volume":"208 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114757793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 27
Semi-hiding operators and the analysis of active-edge specifications for digital circuits 数字电路半隐藏算子及有源边缘规范分析
Proceedings Second International Conference on Application of Concurrency to System Design Pub Date : 2001-06-25 DOI: 10.1109/CSD.2001.981776
R. Negulescu, Xiaohua Kong
{"title":"Semi-hiding operators and the analysis of active-edge specifications for digital circuits","authors":"R. Negulescu, Xiaohua Kong","doi":"10.1109/CSD.2001.981776","DOIUrl":"https://doi.org/10.1109/CSD.2001.981776","url":null,"abstract":"We propose to model and analyze active-edge specifications by a new concurrency operator, called semi-hiding. We define semi-hiding formally, study its algebraic properties, and overview several of its applications, such as interface recasting and tests of compliance for several asynchronous protocols. Semi-hiding and the related applications are integrated in a tool that supports automatic verification at several levels of abstraction.","PeriodicalId":310845,"journal":{"name":"Proceedings Second International Conference on Application of Concurrency to System Design","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125276727","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
From code to models 从代码到模型
Proceedings Second International Conference on Application of Concurrency to System Design Pub Date : 2001-06-25 DOI: 10.1109/CSD.2001.981759
G. Holzmann
{"title":"From code to models","authors":"G. Holzmann","doi":"10.1109/CSD.2001.981759","DOIUrl":"https://doi.org/10.1109/CSD.2001.981759","url":null,"abstract":"One of the corner stones of formal methods is the notion that abstraction enables analysis. By the construction of an abstract model we can trade implementation detail for analytical power. The intent of a model is to preserve selected characteristics of real-world artifact, while suppressing others. Unfortunately, practitioners are less likely to use a modeling tool if it cannot handle real-world artifacts in their native format. The requirement to build a model to enable analysis is often seen as a verdict to design a system twice: once in a verification language. and once in an implementation language. Because the. implementation phase cannot be skipped, verification is often sacrificed. In this paper we will consider a way to avoid this problem by automating the extraction of verification models from implementation level code. The user now provides only model extraction rules, or abstractions, rather than full-scale models.","PeriodicalId":310845,"journal":{"name":"Proceedings Second International Conference on Application of Concurrency to System Design","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114865424","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 49
From formal specifications to ready-to-use software components: the concurrent object oriented Petri net approach 从正式的规范到现成的软件组件:并发面向对象的Petri网方法
Proceedings Second International Conference on Application of Concurrency to System Design Pub Date : 2001-06-25 DOI: 10.1109/CSD.2001.981768
S. Chachkov, Didier Buchs
{"title":"From formal specifications to ready-to-use software components: the concurrent object oriented Petri net approach","authors":"S. Chachkov, Didier Buchs","doi":"10.1109/CSD.2001.981768","DOIUrl":"https://doi.org/10.1109/CSD.2001.981768","url":null,"abstract":"CO-OPN (Concurrent Object Oriented Petri Net) is a formal specification language for modelling distributed systems; it is based on coordinated algebraic Petri nets. We describe a method for generating an executable prototype from a CO-OPN specification. We focus our discussion on the generation of executable code for CO-OPN classes. CO-OPN classes are defined using Petri nets. The main problems arise when implementing synchronization and non-determinism of CO-OPN classes in procedural languages. Our method proposes a solution to these problems. Another interesting aspect of our method is the easy integration of a generated prototype into any existing system. This paper focuses on the generation of Java code that fulfils the Java Beans component architecture, however our approach is also applicable to other object-oriented implementation languages with a component architecture.","PeriodicalId":310845,"journal":{"name":"Proceedings Second International Conference on Application of Concurrency to System Design","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129521507","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 30
Optimization of asynchronous delay-insensitive pipeline latency using stage reorganization and optimal stage parameter estimation 基于阶段重组和最优阶段参数估计的异步延迟不敏感管道延迟优化
Proceedings Second International Conference on Application of Concurrency to System Design Pub Date : 2001-06-25 DOI: 10.1109/CSD.2001.981774
O. Garnica, J. Lanchares, R. Hermida
{"title":"Optimization of asynchronous delay-insensitive pipeline latency using stage reorganization and optimal stage parameter estimation","authors":"O. Garnica, J. Lanchares, R. Hermida","doi":"10.1109/CSD.2001.981774","DOIUrl":"https://doi.org/10.1109/CSD.2001.981774","url":null,"abstract":"This paper is devoted to studying two key issues of the asynchronous pipelines: their performance, and the influence that the position of stages have on the latency of a pipelined asynchronous circuit as a whole. To attain the performance evaluation, we derive expressions of the latency and the cycle time of a linear pipeline as closed-form formulas. To attain the influence of the position, we present some experiments, using the previous closed-form formulas, an different pipelines.","PeriodicalId":310845,"journal":{"name":"Proceedings Second International Conference on Application of Concurrency to System Design","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114639683","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
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