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2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe)最新文献

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The challenges of determining the optimum transformation ratio for a triangular modulated dual active bridge converter 确定三角调制双有源桥式变换器最佳变换器比的挑战
2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe) Pub Date : 2022-09-18 DOI: 10.1109/WiPDAEurope55971.2022.9936454
Olutayo Omotoso, O. Kiselychnyk, Richard A. McMahon, P. Mawby, P. James, M. Mawby
{"title":"The challenges of determining the optimum transformation ratio for a triangular modulated dual active bridge converter","authors":"Olutayo Omotoso, O. Kiselychnyk, Richard A. McMahon, P. Mawby, P. James, M. Mawby","doi":"10.1109/WiPDAEurope55971.2022.9936454","DOIUrl":"https://doi.org/10.1109/WiPDAEurope55971.2022.9936454","url":null,"abstract":"This paper identifies the challenges of determining the optimum transformation ratio (TR) for a triangular modulated dual active bridge converter (TMDABC) applicable for a wide voltage range TMDABC for automotive applications. Duty-cycle-based methodology is developed which shows the restrictions imposed on the TR by the choice of the PWM implementation. The optimal choice of the ratio is considered via transferred power maximisation. A TMDABC is configured in PLECS to verify the method. The DAB converter was operated at 50 kHz within an input voltage range of 100 to 1000 V and output voltage range of 8 to 16 V, providing an output power of 5 kW. Within the threshold of the recommended range of acceptable TRs, the simulation result shows the secondary side RMS current ranges of 388 – 812 A, 435 – 787 A, 464 – 768 A for TRs 5, 4, and 3 respectively compared with 510 – 917 A obtained through the choice TR outside the allowable threshold. The selection approach has potency to reduce current stress and reduce conduction losses (improve efficiency).","PeriodicalId":307445,"journal":{"name":"2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124828758","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Parametric nano-electrical analysis for SiC junctions of a packaged device 封装器件SiC结的参数化纳米电学分析
2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe) Pub Date : 2022-09-18 DOI: 10.1109/WiPDAEurope55971.2022.9936397
R. Germanicus, Wadia Jouha, N. Moultif, P. De Wolf, V. Shah, P. Gammon, U. Lüders, O. Latry
{"title":"Parametric nano-electrical analysis for SiC junctions of a packaged device","authors":"R. Germanicus, Wadia Jouha, N. Moultif, P. De Wolf, V. Shah, P. Gammon, U. Lüders, O. Latry","doi":"10.1109/WiPDAEurope55971.2022.9936397","DOIUrl":"https://doi.org/10.1109/WiPDAEurope55971.2022.9936397","url":null,"abstract":"Precise and accurate electrical characterization of power electronics device die structures at the wafer level is essential to compare device operation to the design and to model reliability issues. In this paper, a parametric analysis for local electrical characterization in two dimensions for a discrete packaged commercial silicon carbide MOSFET is presented. On the cross-sectional sample, electron beam-induced current (EBIC) in a scanning electron microscope (SEM) is used to locate the pn junction of the body diode, evaluating the effect of the electron beam energy on the imaging of this area. Scanning Capacitance Microscopy (SCM) based on an Atomic Force Microscope (AFM) is employed to analyze the junction areas of the packaged silicon carbide MOSFET device. A parametric approach is proposed to reveal the local electrical properties of all layers in the MOSFET (n-, p-type, low, medium and high doping levels of doped SiC epilayers and SiC substrate and the silicon gate). The objective of the paper is to expose the potentialities of EBIC and SCM to perform comprehensive characterization of a SiC packaged device. The influence of the applied voltages (VDC and VAC) during SCM acquisitions is investigated, in order to quantify their effect on the analysis of the doped layers of the MOSFET SiC. The nano-electrical experiments are supported by TCAD simulations of the tip/sample nano-MOS contact to confirm the interpretation in terms of doping levels of the AFM maps of the silicon carbide die.","PeriodicalId":307445,"journal":{"name":"2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122368547","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
The optimisation of a 15 kV 4H-silicon carbide integrated gate commutated thyristor 15 kV 4h碳化硅集成栅整流晶闸管的优化设计
2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe) Pub Date : 2022-09-18 DOI: 10.1109/WiPDAEurope55971.2022.9936508
Q. Cao, P. Gammon, A. B. Renz, L. Zhang, G. Baker, M. Antoniou, N. Lophitis
{"title":"The optimisation of a 15 kV 4H-silicon carbide integrated gate commutated thyristor","authors":"Q. Cao, P. Gammon, A. B. Renz, L. Zhang, G. Baker, M. Antoniou, N. Lophitis","doi":"10.1109/WiPDAEurope55971.2022.9936508","DOIUrl":"https://doi.org/10.1109/WiPDAEurope55971.2022.9936508","url":null,"abstract":"A 15kV SiC thyristor is analysed, considering for the first time the design properties that will ensure the safe, stable operation of the device as an integrated gate commutated thyristor (IGCT), while also minimizing its on-state losses. Key to the optimization is ensuring that, during the turn-off phase, minority carrier charge is commutated via the base to the gate, rather than flowing into the cathode, thus reducing large switching losses, and an unstable transition period. This is made possible in the design presented via the introduction of a highly doped base strip (HDBS), which provides a low resistance channel between the centre of the cathode and the gate. This innovation allows the cathode to be extended, such that it makes up 90% of the top surface, thus minimising on-state losses.","PeriodicalId":307445,"journal":{"name":"2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121625445","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Investigation of Repetitive Short Circuit Stress as a Degradation Metric in Symmetrical and Asymmetrical Double-Trench SiC Power MOSFETs 对称和非对称双沟槽SiC功率mosfet中重复短路应力作为退化指标的研究
2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe) Pub Date : 2022-09-18 DOI: 10.1109/WiPDAEurope55971.2022.9936284
Renze Yu, S. Jahdi, P. Mellor, Juefei Yang, Cheng-Han Shen, Li Liu, O. Alatise, J. Ortiz-Gonzalez
{"title":"Investigation of Repetitive Short Circuit Stress as a Degradation Metric in Symmetrical and Asymmetrical Double-Trench SiC Power MOSFETs","authors":"Renze Yu, S. Jahdi, P. Mellor, Juefei Yang, Cheng-Han Shen, Li Liu, O. Alatise, J. Ortiz-Gonzalez","doi":"10.1109/WiPDAEurope55971.2022.9936284","DOIUrl":"https://doi.org/10.1109/WiPDAEurope55971.2022.9936284","url":null,"abstract":"In this paper, the reliability of planar, symmetrical, and asymmetrical SiC MOSFET is compared under repetitive short circuit shocks. Both static and dynamic parameters are tested after certain cycles to investigate the degradation pattern of the devices. It has been found out that the planar device has the highest reliability and is barely degraded for almost all parameters after 5000 cycles. The symmetrical device has the lowest reliability, which shows degradation after 50 cycles and ultimately fails after 141 cycles. The asymmetrical device shows significant degradation after 100 cycles and fails to turn-on/off after 1000 cycles. For both symmetrical and asymmetrical devices, the degradation is directly linked to the damage of the gate oxide.","PeriodicalId":307445,"journal":{"name":"2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124283945","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An experimentally driven assessment of the dynamic-on resistance in correlation to other performance indicators in commercial Gallium Nitride power devices 实验驱动的动态导通电阻与商业氮化镓功率器件中其他性能指标的相关性评估
2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe) Pub Date : 2022-09-18 DOI: 10.1109/WiPDAEurope55971.2022.9936253
N. Lophitis, S. Perkins, A. Arvanitopoulos, S. Faramehr, P. Igić
{"title":"An experimentally driven assessment of the dynamic-on resistance in correlation to other performance indicators in commercial Gallium Nitride power devices","authors":"N. Lophitis, S. Perkins, A. Arvanitopoulos, S. Faramehr, P. Igić","doi":"10.1109/WiPDAEurope55971.2022.9936253","DOIUrl":"https://doi.org/10.1109/WiPDAEurope55971.2022.9936253","url":null,"abstract":"This work provides an experimentally driven performance comparison of commercial Gallium Nitride on Silicon (GaN-on-Si) power devices rated 600-650V at room and elevated temperatures with the focus being in assessing the on resistance (RON) increase due to hard switching in correlation to other performance indicators. Device technologies evaluated include the Enhancement (E-mode) AlGaN/GaN Hybrid Drain p-GaN layer Gate Injection Transistor (p-GaN HD-GIT), the cascode AlGaN/GaN High Electron Mobility Transistor (cascode HEMT). For the dynamic RON analysis, a special setup was utilized which allows synchronized drain and gate pulses, and the ability to switch from OFF to ON in as little as 20µs. The ability to apply a wide range of voltage levels, stress duration and temperature enabled measurable increase in the dynamic RON in both the cascode HEMT and the p-GaN HD-GIT. Nonetheless, the results highlight a strong difference in their robustness.","PeriodicalId":307445,"journal":{"name":"2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114852911","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design of Medium-Voltage and Medium-Frequency Transformer for Solid State Transformers 固态变压器中压中频变压器的设计
2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe) Pub Date : 2022-09-18 DOI: 10.1109/WiPDAEurope55971.2022.9936139
Diang Xing, Yujie Zhang, Anant Agarwal, Robert N. Guenther, Qianyi Cheng, Boxue Hu, Jin Wang
{"title":"Design of Medium-Voltage and Medium-Frequency Transformer for Solid State Transformers","authors":"Diang Xing, Yujie Zhang, Anant Agarwal, Robert N. Guenther, Qianyi Cheng, Boxue Hu, Jin Wang","doi":"10.1109/WiPDAEurope55971.2022.9936139","DOIUrl":"https://doi.org/10.1109/WiPDAEurope55971.2022.9936139","url":null,"abstract":"This paper presents a design guideline of medium-voltage (MV) and medium-frequency (MF) transformer for the isolated dc/ dc stage in the solid state transformer (SST). A dedicated leakage inductance can be integrated inside the transformer to get rid of the extra auxiliary inductor for phase-shift based power control. Therefore, the circuit prototype could be more compact. The design guideline includes transformer topologies comparison, core material selection, winding type considerations, and power loss & thermal calculations. Some of the design parameters are further illustrated by finite element analysis (FEA). This transformer was fabricated and measured. Finally, the transformer was demonstrated in a 7-kV 10-kW 60-kHz dc/dc converter.","PeriodicalId":307445,"journal":{"name":"2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116864562","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
An Investigation of the Drain-Source Leakage Current Early Transients During HTRB Reliability Tests HTRB可靠性试验中漏源漏电流早期瞬态的研究
2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe) Pub Date : 2022-09-18 DOI: 10.1109/WiPDAEurope55971.2022.9936432
Heaklig Ayala, Mohamed-Amer Karout, J. González, O. Alatise, L. Ran, P. Mawby, Mohamed Taha
{"title":"An Investigation of the Drain-Source Leakage Current Early Transients During HTRB Reliability Tests","authors":"Heaklig Ayala, Mohamed-Amer Karout, J. González, O. Alatise, L. Ran, P. Mawby, Mohamed Taha","doi":"10.1109/WiPDAEurope55971.2022.9936432","DOIUrl":"https://doi.org/10.1109/WiPDAEurope55971.2022.9936432","url":null,"abstract":"High Temperature Reverse Bias (HTRB) is a qualification and reliability test, where devices are subject to high temperature and reverse voltage bias for a defined amount of time (typically 1000 hours), while the drain-source leakage current is monitored. The devices can fail or exhibit patterns of failure at the early stages; hence, it is important to understand the early transient behaviour of the leakage currents while the devices are under test. Moreover, during HTRB, a large number of devices are usually stressed and monitored in parallel. In this paper, two 1200 V SiC MOSFETs of similar current ratings (trench and planar) were investigated. Different experiments have been performed to investigate the exponentially decaying transient of the drain-source leakage current, and the differences between monitoring individual discrete devices and monitoring discrete devices grouped together. Experimental results show that when stressing devices in parallel the exponential decay is common to all the devices, with the total current being the result of adding the individual leakage currents. The impact of the stress voltage applied to the devices (700 to 1000 V) and temperature (50 to 150°C) was also investigated. The results show that generally, the transient time is shorter at lower temperatures, and that it increases as the stress voltage increases. Additionally, the investigated devices showed different relaxation time constants in the orders of thousands (trench) and hundreds (planar) of seconds.","PeriodicalId":307445,"journal":{"name":"2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132387120","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A Phase-change Material Integrated Power Module for Electric Vehicles with Enhanced Short-term Overcurrent Capability 一种增强短期过流能力的电动汽车用相变材料集成电源模块
2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe) Pub Date : 2022-09-18 DOI: 10.1109/WiPDAEurope55971.2022.9936048
Xu Zhang, Yaqing Ma, L. Ran, Jianfeng Li, Yuekang Du, Nikolaos Iosifidis, P. Mawby, Jianying Li
{"title":"A Phase-change Material Integrated Power Module for Electric Vehicles with Enhanced Short-term Overcurrent Capability","authors":"Xu Zhang, Yaqing Ma, L. Ran, Jianfeng Li, Yuekang Du, Nikolaos Iosifidis, P. Mawby, Jianying Li","doi":"10.1109/WiPDAEurope55971.2022.9936048","DOIUrl":"https://doi.org/10.1109/WiPDAEurope55971.2022.9936048","url":null,"abstract":"High power density IGBT inverters are commonly used in electric vehicles to gain high energy efficiency. However, the high power density can lead to a high junction temperature and cause failure, especially when a short-term overcurrent is demanded during the starting or rapid acceleration. The power module capacity needs to be increased for the high performance. This paper proposes a phase change material (PCM) integrated power module for EVs to enhance performance in this aspect. The power loss was calculated based on the electric model of the EV during various driving cycles. The thermal model was analysed by COMSOL to assess the temperature distribution of the module with and without PCM. The results show that the maximum junction temperature can be reduced by up to $20^{circ}mathrm{C}$ under 2pu overcurrent, which can provide the needed overcurrent capacity.","PeriodicalId":307445,"journal":{"name":"2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe)","volume":"93 3-4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114117066","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
4H-SiC Trench Gate Lateral MOSFET with Deep-Shallow Source Trench for Improved RESURF Dose Window and Reduced Oxide Field 采用深浅源壕的4H-SiC沟槽栅横向MOSFET改善了RESURF剂量窗，减小了氧化场
2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe) Pub Date : 2022-09-18 DOI: 10.1109/WiPDAEurope55971.2022.9936422
Hengyu Wang, Baozhu Wang, Borong Hu, Lingxu Kong, F. Udrea, T. Long
{"title":"4H-SiC Trench Gate Lateral MOSFET with Deep-Shallow Source Trench for Improved RESURF Dose Window and Reduced Oxide Field","authors":"Hengyu Wang, Baozhu Wang, Borong Hu, Lingxu Kong, F. Udrea, T. Long","doi":"10.1109/WiPDAEurope55971.2022.9936422","DOIUrl":"https://doi.org/10.1109/WiPDAEurope55971.2022.9936422","url":null,"abstract":"A SiC trench gate lateral MOSFET featuring deep-shallow source trenches (DST - TG-LMOS) is proposed in this work. Numerical simulations by TCAD are conducted to study the performance of the proposed structure and to compare with conventional designs. With the trench gate, the specific ON-resistance is largely reduced. The proposed deep-shallow dual trench structure mitigates the curvature effect near the P+ source region by increasing the effective curvature radius. As a result, the electric field peak at the P+ source is substantially reduced, the RESURF window is expanded and the maximum breakdown voltage is improved. Furthermore, as the deep source trench pushes the electric field away from the gate trench, the off-state oxide field is effectively reduced to below 3MV/cm. In addition, the dual-source-trench structure provides the enhanced screen effect and hence lowers the gate to drain capacitance.","PeriodicalId":307445,"journal":{"name":"2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125695976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Influence of the SiC JFET Gate Impedance on the Off-State Voltage Balance in Cascode Configuration 级联码结构中SiC JFET栅极阻抗对断态电压平衡的影响
2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe) Pub Date : 2022-09-18 DOI: 10.1109/WiPDAEurope55971.2022.9936268
S. Mendy, N. Agbo, J. González, O. Alatise
{"title":"Influence of the SiC JFET Gate Impedance on the Off-State Voltage Balance in Cascode Configuration","authors":"S. Mendy, N. Agbo, J. González, O. Alatise","doi":"10.1109/WiPDAEurope55971.2022.9936268","DOIUrl":"https://doi.org/10.1109/WiPDAEurope55971.2022.9936268","url":null,"abstract":"SiC cascodes are an increasingly utilised circuit configuration. They have low on-state resistance and can switch fast, with good temperature insensitivity. The design of casco des involves determining the proper capacitance ratio between the SiC JFET and low voltage MOSFET. The designer should also implement a circuit/packaging design with appropriate JFET gate loop impedance to have a stable switching device that does not exceed the MOSFET blocking voltage during the repetitive OFF -state. An accurate model is presented, parameterised using the device datasheets, and involves all the parasitics of a SiC JFET cascode configuration. The model is accompanied by experimental measurements and is used to explore and explain the influence of the JFET gate loop impedance on the switching performance of the cascode and the OFF -state voltage of the MOSFET. The JFET gate resistance is found to be very influential in determining the repetitive LV MOSFET blocking voltage and the HV JFET OFF-state gate voltage.","PeriodicalId":307445,"journal":{"name":"2022 IEEE Workshop on Wide Bandgap Power Devices and Applications in Europe (WiPDA Europe)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133711834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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