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Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)最新文献

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System Canvas: a new design environment for embedded DSP and telecommunication systems 系统画布:一种用于嵌入式DSP和电信系统的新设计环境
Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571) Pub Date : 2001-04-25 DOI: 10.1145/371636.371675
P. Murthy, E. Cohen, Steve Rowland
{"title":"System Canvas: a new design environment for embedded DSP and telecommunication systems","authors":"P. Murthy, E. Cohen, Steve Rowland","doi":"10.1145/371636.371675","DOIUrl":"https://doi.org/10.1145/371636.371675","url":null,"abstract":"We present a new design environment, called System Canvas, targeted at DSP and telecommunication system designs. Our environment uses an easy-to-use block-diagram syntax to specify systems at a very high level of abstraction. The block diagram syntax is based on formal semantics, and uses a number of different models of computation including cyclo-static dataflow, dynamic dataflow, and a discrete-event model. A key feature of our tool is that the user does not need to have an awareness of which model is being used: the models can be freely mixed and matched and a simulation can consist of an arbitrary combination of models. The blocks are written in 'C' or 'C++' and it is straightforward to write custom blocks and incorporate them into custom libraries. Other key features include the ability to control simulations via language-neutral scripts and a powerful optimization engine that enables optimization of the system over arbitrarily specified-parameters, constraints, and cost functions. Fixed-point analysis capability allows any signal or variable in the system to be set to any type of number system before the simulation proceeds are tool is available on the Windows NT platform and incorporates modern and ubiquitous Windows GUI look and feel.","PeriodicalId":306764,"journal":{"name":"Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115455340","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 20
A novel parallel deadlock detection algorithm and architecture 一种新的并行死锁检测算法和结构
Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571) Pub Date : 2001-04-25 DOI: 10.1145/371636.371684
P. Shiu, Yudong Tan, V. Mooney
{"title":"A novel parallel deadlock detection algorithm and architecture","authors":"P. Shiu, Yudong Tan, V. Mooney","doi":"10.1145/371636.371684","DOIUrl":"https://doi.org/10.1145/371636.371684","url":null,"abstract":"A novel deadlock detection algorithm and its hardware implementation are presented in this paper. The hardware deadlock detection algorithm has a run time complexity of O/sub hw/(min(m,n)), where m and n are the number of processors and resources, respectively. Previous algorithms based on a resource allocation graph have O/sub sw/(m/spl times/n) run time complexity for the worst case. We simulate a realistic example in which the hardware deadlock detection unit is applied, and demonstrate that the hardware implementation of the novel deadlock detection algorithm reduces deadlock detection time by 99.5%. Furthermore, in a realistic example, total execution time is reduced by 68.9%.","PeriodicalId":306764,"journal":{"name":"Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122311130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 42
Formal synthesis and code generation of embedded real-time software 嵌入式实时软件的形式化合成与代码生成
Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571) Pub Date : 2001-04-25 DOI: 10.1109/HSC.2001.924677
Pao-Ann Hsiung
{"title":"Formal synthesis and code generation of embedded real-time software","authors":"Pao-Ann Hsiung","doi":"10.1109/HSC.2001.924677","DOIUrl":"https://doi.org/10.1109/HSC.2001.924677","url":null,"abstract":"Due to rapidly increasing system complexity, shortening time-to-market, and growing demand for hard real-time systems, formal methods are becoming indispensable in the synthesis of embedded systems, which must satisfy stringent temporal, memory, and environment constraints. There is a general lack of practical formal methods that can synthesize complex embedded real-time software (ERTS). In this work, a formal method based on Time Free-Choice Petri Nets (TFCPN) is proposed for ERTS synthesis. The synthesis method employs quasi-static data scheduling for satisfying limited embedded memory requirements and uses dynamic real-time scheduling for satisfying hard real-time constraints. Software code is then generated from a set of quasi-statically and dynamically scheduled TFCPNs. Finally, an application example is given to illustrate the feasibility of the proposed TFCPN-based formal method for ERTS synthesis.","PeriodicalId":306764,"journal":{"name":"Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)","volume":"142 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116588015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 30
Designing domain-specific processors 设计特定于领域的处理器
Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571) Pub Date : 2001-04-25 DOI: 10.1109/HSC.2001.924652
M. Arnold, H. Corporaal
{"title":"Designing domain-specific processors","authors":"M. Arnold, H. Corporaal","doi":"10.1109/HSC.2001.924652","DOIUrl":"https://doi.org/10.1109/HSC.2001.924652","url":null,"abstract":"We present a semi-automated method for the detection and exploitation of application domain specific instruction set extensions for embedded (VLIW) processors. It consists of three steps: the first step detects frequently occurring operation patterns, in the second step, the patterns are grouped and implemented in a number of Special Function Units (SFUs) and the third step incorporates the custom operations into the code generation process. Experiments show that the SFUs generated and exploited with our methodology can result in architectures that perform up to 30% better than architectures of the same cost without SFUs.","PeriodicalId":306764,"journal":{"name":"Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128508296","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 129
Processor frequency setting for energy minimization of streaming multimedia application 处理器频率设置的能量最小化流媒体应用程序
Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571) Pub Date : 2001-04-25 DOI: 10.1145/371636.371747
A. Acquaviva, L. Benini, B. Riccò
{"title":"Processor frequency setting for energy minimization of streaming multimedia application","authors":"A. Acquaviva, L. Benini, B. Riccò","doi":"10.1145/371636.371747","DOIUrl":"https://doi.org/10.1145/371636.371747","url":null,"abstract":"In this paper, we describe a software-controlled approach for adaptively minimizing energy in embedded systems for real-time multimedia processing. Energy is optimized by clock speed setting: the software controller dynamically adjusts processor clock speed to the frame rate requirements of the incoming multimedia stream. The speed-setting policy is based on a system model that correlates clock speed with best-case, average-case and worst-case sustainable frame rate, accounting for data-dependency in multimedia streams. Experiments on an MP3 decoding application show that computational energy can be drastically reduced with respect to fixed-frequency operation.","PeriodicalId":306764,"journal":{"name":"Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129407618","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Hardware/software partitioning of embedded system in OCAPI-xl OCAPI-xl中嵌入式系统的软硬件分区
Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571) Pub Date : 2001-04-25 DOI: 10.1145/371636.371665
G. Vanmeerbeeck, P. Schaumont, S. Vernalde, M. Engels, I. Bolsens
{"title":"Hardware/software partitioning of embedded system in OCAPI-xl","authors":"G. Vanmeerbeeck, P. Schaumont, S. Vernalde, M. Engels, I. Bolsens","doi":"10.1145/371636.371665","DOIUrl":"https://doi.org/10.1145/371636.371665","url":null,"abstract":"The implementation of embedded networked appliances requires a mix of processor cores and HW accelerators on a single chip. When designing such complex and heterogeneous SoCs, the HW/SW partitioning decision needs to be made prior to refining the system description. With OCAPI-xl, we developed a methodology in which the partitioning decision can be made anywhere in the design flow, even just prior to doing code-generation for both HW and SW. This is made possible thanks to a refinable, implementable, architecture independent system description. The OCAPI-xl model was used to develop a stand alone, networked camera, with onboard GIF engine and network layer.","PeriodicalId":306764,"journal":{"name":"Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122043723","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 75
Task concurrency management methodology to schedule the MPEG4 IM1 player on a highly parallel processor platform 在高度并行的处理器平台上调度MPEG4 IM1播放器的任务并发管理方法
Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571) Pub Date : 2001-04-25 DOI: 10.1145/371636.371712
Chun Wong, P. Marchal, Peng Yang
{"title":"Task concurrency management methodology to schedule the MPEG4 IM1 player on a highly parallel processor platform","authors":"Chun Wong, P. Marchal, Peng Yang","doi":"10.1145/371636.371712","DOIUrl":"https://doi.org/10.1145/371636.371712","url":null,"abstract":"This paper addresses the concurrent task management of complex multi-media systems, like the MPEG4 IM1 player with emphasis on how to derive energy-cost vs time-budget curves through task scheduling on a multi-processor platform. Starting from the original \"standard\" specification, we extract the concurrency originally hidden by implementation decisions in a \"grey-box\" model. Then we have applied two high-level transformations on this model to improve the task-level concurrency. Finally, by scheduling the transformed task-graph, we have derived energy-cost vs time-budget curves. These curves will be used to get globally optimized design decisions when combining subsystems into one complete system or to be used by a dynamic scheduler. The results on the MPEG4 IM1 player confirm the validity of our assumptions and the usefulness of our approach.","PeriodicalId":306764,"journal":{"name":"Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117113737","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 34
The usage of stochastic processes in embedded system specifications 随机过程在嵌入式系统规范中的使用
Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571) Pub Date : 2001-04-25 DOI: 10.1145/371636.371646
A. Jantsch, I. Sander, W. Wu
{"title":"The usage of stochastic processes in embedded system specifications","authors":"A. Jantsch, I. Sander, W. Wu","doi":"10.1145/371636.371646","DOIUrl":"https://doi.org/10.1145/371636.371646","url":null,"abstract":"We review the use of nondeterminism and identify two different purposes. The descriptive purpose handles uncertainties in the behaviour of existing entities. The constraining purpose is used in specifications to constrain implementations. For the specification of embedded systems we suggest a stochastic process /spl sigma/ instead of nondeterminism. It serves mostly the descriptive purpose but can also be used to constrain the system. We carefully distinguish different interpretations of these concepts by the different design activities simulation, synthesis and verification.","PeriodicalId":306764,"journal":{"name":"Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124047782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 11
Deriving hard real-time embedded systems implementations directly from SDL specifications 直接从SDL规范派生硬实时嵌入式系统实现
Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571) Pub Date : 2001-04-25 DOI: 10.1109/HSC.2001.924663
J. M. Álvarez, M. Díaz, L. Llopis, E. Pimentel, J. M. Troya
{"title":"Deriving hard real-time embedded systems implementations directly from SDL specifications","authors":"J. M. Álvarez, M. Díaz, L. Llopis, E. Pimentel, J. M. Troya","doi":"10.1109/HSC.2001.924663","DOIUrl":"https://doi.org/10.1109/HSC.2001.924663","url":null,"abstract":"Object-oriented methodologies together with formal description techniques (FDT) are a promising way to deal with the increasing complexity of hard real-time embedded systems. However, FDTs do not take into account nonfunctional aspects as real-time constraints. Based on a new real-time execution model for FDT SDL proposed in previous works, a way to derive implementations of hard real-time embedded systems directly from SDL specifications is presented. In order to get it we propose a middleware that supports this model to organize the execution of the tasks generated from SDL system specification. Additionally, a worst case real-time analysis, including the middleware overhead, is presented. Finally, an example to generate the implementation from the SDL specification and a performance study is developed.","PeriodicalId":306764,"journal":{"name":"Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125475291","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Empirical comparison of software-based error detection and correction techniques for embedded systems 基于软件的嵌入式系统错误检测与校正技术的实证比较
Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571) Pub Date : 2001-04-25 DOI: 10.1145/371636.371739
Royan H. L. Ong, M. Pont
{"title":"Empirical comparison of software-based error detection and correction techniques for embedded systems","authors":"Royan H. L. Ong, M. Pont","doi":"10.1145/371636.371739","DOIUrl":"https://doi.org/10.1145/371636.371739","url":null,"abstract":"\"Function Tokens\" and \"NOP Fills\" are two methods proposed by various authors to deal with instruction pointer corruption in microcontrollers, especially in the presence of high electromagnetic interference levels. An empirical analysis to assess and compare these two techniques is presented in this paper. Two main conclusions are drawn: [1] NOP Fills are a powerful technique for improving the reliability of embedded applications in the presence of EMI, and [2] the use of function tokens can lead to a reduction in overall system reliability.","PeriodicalId":306764,"journal":{"name":"Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571)","volume":"218 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126034945","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 6
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