2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME)最新文献

Preventing the Temperature Side Channel Attacks on Security Circuits 防止安全电路的温度侧通道攻击

2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2019-10-01 DOI: 10.1109/SIITME47687.2019.8990788

D. Vasile, P. Svasta, M. Pantazica

{"title":"Preventing the Temperature Side Channel Attacks on Security Circuits","authors":"D. Vasile, P. Svasta, M. Pantazica","doi":"10.1109/SIITME47687.2019.8990788","DOIUrl":"https://doi.org/10.1109/SIITME47687.2019.8990788","url":null,"abstract":"Security circuits are important parts of communication and data processing equipment. Nowadays technologies and computation power can be used in cryptanalytic attacks against these specialized pieces of equipment. Some collateral procedures have been developed to facilitate these attacks and they are called Side Channel Attacks. They force the physical limits of the logic circuits in order to provoke erroneous operations that will later help the cryptanalytic attacks. One of the most used side channel attack consists in forcing the security circuit to work at temperatures out of the operating limits or to quickly freeze it. Freezing at very low temperatures can block processors and memories with resident secret data stored in them. Later on, these data can be acquired and used in cryptanalytic attacks. This paper proposes a special conductive mesh that can act also as a temperature sensor. Besides its function to detect physical intrusions, its behavior at temperature variations makes it a very good detector of temperature side channel attacks. Considering that the conductive mesh is covering the security circuit, the active tamper detection circuit, which probes with signals and analyze the response of the conductive mesh, is capable of detecting more quickly the temperature variations than a temperature sensor located at the circuit board.","PeriodicalId":301396,"journal":{"name":"2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114892901","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

Aspects Regarding Radiated Emissions Produced by a Head Up Display 关于平视显示器产生的辐射辐射的问题

2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2019-10-01 DOI: 10.1109/SIITME47687.2019.8990882

Octavian-Teodor Pacurar, A. Silaghi, A. De Sabata

引用次数: 1

IoT Solution for Plant Monitoring in Smart Agriculture 智能农业植物监测物联网解决方案

2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2019-10-01 DOI: 10.1109/SIITME47687.2019.8990798

I. Marcu, G. Suciu, C. Balaceanu, A. Dragulinescu, M. Dobrea

引用次数: 7

Automated Thermal Images Processing System for Change Detection and Diagnosis 用于变化检测和诊断的自动热图像处理系统

2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2019-10-01 DOI: 10.1109/SIITME47687.2019.8990719

S. Pavel, D. Aiordachioaie, L. Frangu

引用次数: 4

Electrically Conductive Paste Printed Volume Influence on Bonds Properties 导电浆料印刷体积对键合性能的影响

2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2019-10-01 DOI: 10.1109/SIITME47687.2019.8990829

M. Branzei, G. Vărzaru, M. Vlădescu, B. Mihailescu, I. Plotog

引用次数: 0

2D Virtual Laboratory for Teaching BCD to Seven-Segment Decoders in Logic Design Classes 逻辑设计课七段解码器BCD教学的二维虚拟实验室

2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2019-10-01 DOI: 10.1109/SIITME47687.2019.8990769

N. Evstatieva, B. Evstatiev, Dimitar Trifonov

引用次数: 1

Investigating shadowing and possible tombstoning caused by large SMD components during vapour phase reflow soldering 调查在气相回流焊过程中由大型SMD组件引起的阴影和可能的墓碑

2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2019-10-01 DOI: 10.1109/SIITME47687.2019.8990744

A. Géczy, Dániel Szalmási, Dániel Straubinger, B. Illés

{"title":"Investigating shadowing and possible tombstoning caused by large SMD components during vapour phase reflow soldering","authors":"A. Géczy, Dániel Szalmási, Dániel Straubinger, B. Illés","doi":"10.1109/SIITME47687.2019.8990744","DOIUrl":"https://doi.org/10.1109/SIITME47687.2019.8990744","url":null,"abstract":"In this paper, the tombstoning failure is investigated during heat-level type vapour phase reflow soldering (VPS), where the heat transfer is based on condensation. Different measurements were performed according to different printed circuit board (PCB) test patterns, to investigate possible shadowing caused by larger surface mounted (SMD) components in the close proximity of smaller surface mounted components, pointing to possible tombstoning failures either by condensate congestion or by vapour concentration dynamics. The basic concept was to intercept, whether a large power electronics component would affect the heating on nearby smaller chip-sized resistors, which are susceptible to such problems during VPS. Three test patterns were applied according to different component orientation. Three 0805 and an alternative 0603 component matrix was designed around larger components in the centre on printed circuit boards, where three further setups were investigated: a 4036 large size SMD capacitor, a XAL1010 SMD inductor, and without large SMD, for reference setup. A sweep on the power settings was performed with a heat-level vapour phase soldering oven. Shear strength of the components was also evaluated. It was found that both the shear strength of the components and the occurring tombstone failures of the solder joints are affected rather by paste printing and positioning precision, than any shadowing caused by larger components. The results might be used for further investigations of the tombstone failure during VPS, and during special soldering cases where thermal profiles must be set with unorthodox approaches (e.g. thermally sensitive biodegradables).","PeriodicalId":301396,"journal":{"name":"2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"185 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116376022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Education 4.0 – Jump to Innovation with IoT in Higher Education 教育4.0 -高等教育物联网创新

2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2019-10-01 DOI: 10.1109/SIITME47687.2019.8990825

M. Ciolacu, Leon Binder, P. Svasta, Ioan Tache, Dan Stoichescu

引用次数: 29

Analysis of positioning errors for LED LED定位误差分析

2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2019-10-01 DOI: 10.1109/SIITME47687.2019.8990720

Adrian Mocan, I. Ciascai

引用次数: 4

Software-in-the-Loop System for Motor Control Algorithms 电机控制算法的软件在环系统

2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME) Pub Date : 2019-10-01 DOI: 10.1109/SIITME47687.2019.8990711

M. Taut, G. Chindris, A. Taut

{"title":"Software-in-the-Loop System for Motor Control Algorithms","authors":"M. Taut, G. Chindris, A. Taut","doi":"10.1109/SIITME47687.2019.8990711","DOIUrl":"https://doi.org/10.1109/SIITME47687.2019.8990711","url":null,"abstract":"This paper examines the reliability of the Software-in-the-Loop (SiL) testing environment precisely to test embedded system algorithms. The integrated algorithms system was developed around a BLDC motor based on a real-time operating system. The main features and functions of the control algorithms developed and implemented in an embedded system is to control the BLDC motor speed. The integration of the control algorithms of a BLDC motor model from the Model-in-the-Loop (MiL) process into the SiL process comes precisely from the increasing need to reduce the amount of prototype testing and to check the resistance of control algorithms to conditions errors that are not practical to test on the hardware. To prove the efficiency of the SIL strategy, three types of algorithms have been developed and implemented for controlling such an electric motor by applying optimization techniques based on closed-loop regulators. The code generated after these models is tested and validated through different test scenarios according to the source model, creating a test report after which we can validate the correctness of the code generated in the SiL process.","PeriodicalId":301396,"journal":{"name":"2019 IEEE 25th International Symposium for Design and Technology in Electronic Packaging (SIITME)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115802098","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0