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Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception最新文献

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Fast retrieval on compressed images for internet applications 快速检索压缩图像的互联网应用程序
Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception Pub Date : 2000-09-11 DOI: 10.1109/CAMP.2000.875970
M. Albanesi, Alessandro Giancane
{"title":"Fast retrieval on compressed images for internet applications","authors":"M. Albanesi, Alessandro Giancane","doi":"10.1109/CAMP.2000.875970","DOIUrl":"https://doi.org/10.1109/CAMP.2000.875970","url":null,"abstract":"In this paper we present a method to incorporate a content-based retrieval algorithm on compressed images with a digital image transform scheme to achieve a low cost and fast indexing method. The target application is the access and interaction with huge amount of visual data on Internet. The approach exploits a modified Wavelet multiresolution decomposition and reconstruction scheme and a multiresolution algorithm for feature extraction and index generation. The efficacy of the method has been proved by extensive tests on YUV compressed JPEG images and the performance have been compared with other approaches on uncompressed, original images, even with the addition of noise. The results suggest a great opportunity to embed in a unique paradigm a fast retrieval technique and a good compression algorithm of low computational complexity, very suitable for Internet imaging applications.","PeriodicalId":282003,"journal":{"name":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133697380","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Space variant vision and pipelined architecture for time to impact computation 空间变视和流水线结构，时间影响计算
Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception Pub Date : 2000-09-11 DOI: 10.1109/CAMP.2000.875967
F. Pardo, I. Llorens, F. Micó, J. Boluda
{"title":"Space variant vision and pipelined architecture for time to impact computation","authors":"F. Pardo, I. Llorens, F. Micó, J. Boluda","doi":"10.1109/CAMP.2000.875967","DOIUrl":"https://doi.org/10.1109/CAMP.2000.875967","url":null,"abstract":"Image analysis is one of the most interesting ways for a mobile vehicle to understand its environment. One of the tasks of an autonomous vehicle is to get accurate information of what it has in front, to avoid collision or find a way to a target. This task requires real-time restrictions depending on the vehicle speed and external object movement. The use of normal cameras, with homogeneous (squared) pixel distribution, for real-time image processing, usually requires high performance computing and high image rates. A different approach makes use of a CMOS space-variant camera that yields a high frame rate with low data bandwidth. The camera also performs the log-polar transform, simplifying some image processing algorithms. One of this simplified algorithms is the time to impact computation. The calculation of the time to impact uses a differential algorithm. A pipelined architecture specially suited for differential image processing algorithms has been also developed using programmable FPGAs.","PeriodicalId":282003,"journal":{"name":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","volume":"9 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131475657","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Anet: a programming environment for parallel image analysis 并行图像分析的编程环境
Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception Pub Date : 2000-09-11 DOI: 10.1109/CAMP.2000.875987
B. Ducourthial, A. Mérigot, Nicolas Sicard
{"title":"Anet: a programming environment for parallel image analysis","authors":"B. Ducourthial, A. Mérigot, Nicolas Sicard","doi":"10.1109/CAMP.2000.875987","DOIUrl":"https://doi.org/10.1109/CAMP.2000.875987","url":null,"abstract":"In this paper we present the programming environment Anet for image analysis, that aims to bridge the gap between programmability requirements and parallel efficiency. It is based on the graph based associative nets computing model, and allows irregular data manipulation. As it is intrinsically a parallel model, parallel execution can be quite naturally considered, and as the number of primitives is small, effective parallelization requires an initial limited effort and can be reused by a large set of programs.","PeriodicalId":282003,"journal":{"name":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126554567","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
2-D object recognition by structured neural networks in a pyramidal architecture 基于金字塔结构的结构化神经网络的二维目标识别
Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception Pub Date : 2000-09-11 DOI: 10.1109/CAMP.2000.875961
V. Cantoni, A. Petrosino
{"title":"2-D object recognition by structured neural networks in a pyramidal architecture","authors":"V. Cantoni, A. Petrosino","doi":"10.1109/CAMP.2000.875961","DOIUrl":"https://doi.org/10.1109/CAMP.2000.875961","url":null,"abstract":"In the paper we propose an approach to the realization of models inspired to biological solutions for pattern recognition. The approach is based on a hierarchical modular structure capable to learn by examples and recognize objects in digital images. The adopted techniques are based on multiresolution image correlation and neural networks. Performance on two different data sets and experimental timings on a SIMD machine are also reported.","PeriodicalId":282003,"journal":{"name":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115258819","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
On quantum and classical computing with arrays of superconducting persistent current qubits 超导恒流量子比特阵列的量子与经典计算
Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception Pub Date : 2000-09-11 DOI: 10.1109/CAMP.2000.875960
P. Jonker, Jie Han
{"title":"On quantum and classical computing with arrays of superconducting persistent current qubits","authors":"P. Jonker, Jie Han","doi":"10.1109/CAMP.2000.875960","DOIUrl":"https://doi.org/10.1109/CAMP.2000.875960","url":null,"abstract":"A superconducting qubit (or quantum bit), which consists of a micrometer-sized loop with three or four Josephson junctions, has two persistent currents of opposite direction as its two states. The states of the qubits, manipulated with magnetic fields and measured with a SQUID, can be brought into quantum coherence to perform quantum computing. Classical bits can also be obtained from these superconducting loops by increasing its critical current, making it possible to base a processor array architecture on these cubits (quantum bits used in a classical way). Such a classical computer might also serve as pre and post processor for the quantum computing performed in the heart of the array. Because classical and quantum computing based on the same device can be studied now simultaneously, architecture of arrays of qubits and cubits seems a good vehicle for studying the quantum computer paradigm, independently from the question whether superconducting loops will be the ultimate implementation vehicle. Other (e.g. spin-based) devices may be more successful. In this paper, the architectural issues of a heterogeneous quantum/classical computer for an implementation of Shor's factoring algorithm based on arrays of qubits and cubits, are presented.","PeriodicalId":282003,"journal":{"name":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128490241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 7
Hardware supported technique for detecting multi-corners in digital contours 数字轮廓中多角检测的硬件支持技术
Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception Pub Date : 2000-09-11 DOI: 10.1109/CAMP.2000.875991
A. Sluzek
{"title":"Hardware supported technique for detecting multi-corners in digital contours","authors":"A. Sluzek","doi":"10.1109/CAMP.2000.875991","DOIUrl":"https://doi.org/10.1109/CAMP.2000.875991","url":null,"abstract":"The paper reports development of a simple and reliable multi-corner detection technique that combines local computational schemes and an inexpensive model-based matching approach. The input data are digital contour images extracted from camera-captured scenes by using any edge detector. Although most of the results have been obtained by using the software implementation, the algorithm's structure has been optimised for hardware implementation. A preliminary hardware design has been proposed, and some of the modules have been already implemented in FPGA. Eventually, it should be possible to detect on-line all multi-corners (and to determine their geometry) within images incoming at standard (e.g. TV) rates. The algorithm has been developed within a joint research project of Robotics Research Centre (NTU) and British Gas Asia Pacific on development of an autonomous underwater vehicle for specialised applications.","PeriodicalId":282003,"journal":{"name":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","volume":"2016 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128036610","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 3
High speed target tracking vision chip 高速目标跟踪视觉芯片
Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception Pub Date : 2000-09-11 DOI: 10.1109/CAMP.2000.875958
T. Komuro, I. Ishii, M. Ishikawa, A. Yoshida
{"title":"High speed target tracking vision chip","authors":"T. Komuro, I. Ishii, M. Ishikawa, A. Yoshida","doi":"10.1109/CAMP.2000.875958","DOIUrl":"https://doi.org/10.1109/CAMP.2000.875958","url":null,"abstract":"This paper describes a new vision chip architecture for high speed target tracking. The system speed and pixel size improved by hardware implementation of a special algorithm which utilizes a property of high speed vision. Using an asynchronous and bit-serial propagation method, global moments of the image are calculated at high speed and with small circuits. Based on the new architecture a 64/spl times/64 pixel prototype chip has been developed.","PeriodicalId":282003,"journal":{"name":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130244320","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 15
Multi-media extensions in super-pipelined micro-architectures. A new case for SIMD processing? 超流水线微体系结构中的多媒体扩展。SIMD处理的新情况?
Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception Pub Date : 2000-09-11 DOI: 10.1109/CAMP.2000.875984
M. Ferretti
{"title":"Multi-media extensions in super-pipelined micro-architectures. A new case for SIMD processing?","authors":"M. Ferretti","doi":"10.1109/CAMP.2000.875984","DOIUrl":"https://doi.org/10.1109/CAMP.2000.875984","url":null,"abstract":"General purpose microprocessors have long been considered a computing platform unsuited to image processing and vision tasks. The so-called Von-Neumann paradigm and the associated memory bottleneck have motivated the research into various forms of parallel processing and of special processors for vision. The SIMD approach, adopted in massively parallel processors, has been introduced in a minimal format in the multimedia extensions to instruction set architectures of standard microprocessors. This paper examines the characteristics of SIMD processing that have been mapped into these extensions.","PeriodicalId":282003,"journal":{"name":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133061171","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 10
Homography based parallel volume intersection: toward real-time volume reconstruction using active cameras 基于单应性的平行体相交:利用活动摄像机实现实时体重建
Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception Pub Date : 2000-09-11 DOI: 10.1109/CAMP.2000.875992
T. Wada, Xiaojun Wu, Shogo Tokai, T. Matsuyama
{"title":"Homography based parallel volume intersection: toward real-time volume reconstruction using active cameras","authors":"T. Wada, Xiaojun Wu, Shogo Tokai, T. Matsuyama","doi":"10.1109/CAMP.2000.875992","DOIUrl":"https://doi.org/10.1109/CAMP.2000.875992","url":null,"abstract":"Silhouette volume intersection is one of the most popular ideas for reconstructing the 3D volume of an object from multi-viewpoint silhouette images. This paper presents a novel parallel volume intersection method based on plane-to-plane homography for real-time 3D volume reconstruction using active cameras. This paper mainly focuses on the acceleration of back-projection from silhouette images to 3D space without using any sophisticated software technique, such as octree volume representation, or look-up table based projection acceleration. Also this paper presents a parallel intersection method of projected silhouette images. From the preliminary experimental results we estimate near frame-rate volume reconstruction for a life-sized mannequin can be achieved at 3 cm spatial resolution on our PC cluster system.","PeriodicalId":282003,"journal":{"name":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132616539","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 64
How to use high speed reconfigurable FPGA for real time image processing? 如何使用高速可重构FPGA进行实时图像处理?
Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception Pub Date : 2000-09-11 DOI: 10.1109/CAMP.2000.875983
D. Demigny, L. Kessal, R. Bourguiba, N. Boudouani
{"title":"How to use high speed reconfigurable FPGA for real time image processing?","authors":"D. Demigny, L. Kessal, R. Bourguiba, N. Boudouani","doi":"10.1109/CAMP.2000.875983","DOIUrl":"https://doi.org/10.1109/CAMP.2000.875983","url":null,"abstract":"In France, ten research teams study and build a hardware architecture (ARDOISE) which is dedicated to real time image processing. This architecture uses fast or dynamic reconfiguration allowed by new FPGA circuits. During a video frame duration, several algorithms are computed sequentially on the same hardware. This paper highlights the architectural concepts used to build ARDOISE. Then an analytical model is defined in order to complete the limits and the performances expected in the use of the dynamic reconfiguration scheme. An example in image segmentation is developed to show a possible partitioning methodology.","PeriodicalId":282003,"journal":{"name":"Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122142755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 24
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