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2006 Workshop on High Performance Switching and Routing最新文献

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Dynamic routing and traffic engineering in survivable MPLS networks 可生存MPLS网络中的动态路由和流量工程
2006 Workshop on High Performance Switching and Routing Pub Date : 2006-10-16 DOI: 10.1109/HPSR.2006.1709729
K. Walkowiak
{"title":"Dynamic routing and traffic engineering in survivable MPLS networks","authors":"K. Walkowiak","doi":"10.1109/HPSR.2006.1709729","DOIUrl":"https://doi.org/10.1109/HPSR.2006.1709729","url":null,"abstract":"The goal of traffic engineering in dynamic routing is to select a single path that satisfies a specified QoS performance metric and optimizes network usage. Since loss of service means loss of revenues, network survivability is one of the most important components of QoS. Our idea is to modify existing dynamic routing algorithms in order to improve performance of the network in terms of survivability. Therefore, we apply our previous approach of a scaling factor based on LFL (lost flow in link) function developed for local repair method. However, in this work we extend our concept by introducing a calibration parameter to the scaling factor. Furthermore, we present a more detailed simulation study of this approach including global repair method. Simulations show that proposed approach can significantly improve network survivability","PeriodicalId":274390,"journal":{"name":"2006 Workshop on High Performance Switching and Routing","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127775681","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Packet mode scheduling in buffered crossbar (CICQ) switches CICQ交换机的包模式调度
2006 Workshop on High Performance Switching and Routing Pub Date : 2006-10-16 DOI: 10.1109/HPSR.2006.1709690
G. Passas, M. Katevenis
{"title":"Packet mode scheduling in buffered crossbar (CICQ) switches","authors":"G. Passas, M. Katevenis","doi":"10.1109/HPSR.2006.1709690","DOIUrl":"https://doi.org/10.1109/HPSR.2006.1709690","url":null,"abstract":"Buffered crossbars have emerged as an advantageous switch architecture mainly due to their scheduling efficiency and capacity to operate directly on variable size packets. Such operation requires crosspoint buffers at least as large as one maximum packet each. When we cannot afford that large crosspoint buffers, we are forced to segment packets. Although variable-size segments can be used to avoid padding overheads, we are still left with the cost of reassembly buffers and the associated delays. This paper applies packet mode scheduling to buffered crossbars in order to remedy these shortcomings: all segments of a variable-size packet are switched consecutively in time. We propose two scheduling schemes: probabilistic and deterministic packet mode scheduling. The probabilistic case allows cut-through forwarding and operates with independent crossbar output schedulers, but it requires reassembly buffers. Deterministic scheduling sacrifices some scheduler independence in order to eliminate reassembly buffers. Using simulation we show that it performs very close to buffered crossbars with no segmentation and large buffers at the crosspoints","PeriodicalId":274390,"journal":{"name":"2006 Workshop on High Performance Switching and Routing","volume":"217 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133848981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Effects of link failures on the overall blocking behavior of banyan-based optical switches 链路故障对榕树光交换机整体阻塞行为的影响
2006 Workshop on High Performance Switching and Routing Pub Date : 2006-10-16 DOI: 10.1109/HPSR.2006.1709719
X. Jiang, Mu.R. Khandker, P. Ho, S. Horiguchi, M. Guo, H. Mouftah
{"title":"Effects of link failures on the overall blocking behavior of banyan-based optical switches","authors":"X. Jiang, Mu.R. Khandker, P. Ho, S. Horiguchi, M. Guo, H. Mouftah","doi":"10.1109/HPSR.2006.1709719","DOIUrl":"https://doi.org/10.1109/HPSR.2006.1709719","url":null,"abstract":"Due to its nice properties of small depth and absolute signal loss uniformity, vertical stacking of optical banyan (VSOB) networks becomes an attractive optical switch architecture. It is expected that a VSOB switch will have a good fault-tolerant capability, because it consists of multiple banyan networks. To verify our expectation, in this paper we study the overall blocking behavior of a VSOB switch by establishing an upper bound on its blocking probability in presence of link failures. The upper bound accurately depicts the overall blocking behavior of a VSOB switch for a reasonable small link failure rate, as verified by extensive simulation results. Although our upper bound demonstrates that VSOB switches have a good fault-tolerance property, it reveals a surprising overall blocking behavior of a faulty VSOB switch that, not as we usually expected, the blocking probability of the switch may not always increase monotonously with the increase of link failure rate. Our upper bound is significant, because it provides switch designers a quantitative tool to determine the effects of link failure on the blocking behavior and to estimate the maximum blocking probability of a VSOB switch, in which different routing algorithms can be applied with a guaranteed performance in terms of blocking probability and hardware cost","PeriodicalId":274390,"journal":{"name":"2006 Workshop on High Performance Switching and Routing","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127694703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Greedy maximal weighted scheduling for optical packet switches 光分组交换机贪心最大加权调度
2006 Workshop on High Performance Switching and Routing Pub Date : 2006-10-16 DOI: 10.1109/HPSR.2006.1709709
Zhen Zhou, M. Hamdi
{"title":"Greedy maximal weighted scheduling for optical packet switches","authors":"Zhen Zhou, M. Hamdi","doi":"10.1109/HPSR.2006.1709709","DOIUrl":"https://doi.org/10.1109/HPSR.2006.1709709","url":null,"abstract":"Greedy algorithms are appealing not only because of their simplicity but also because of their effectiveness. In this paper, we study the possible greedy solutions for the optical switch scheduling problem. In particular, our algorithm 2-AUGMENTATION combines the idea of simple greedy algorithm and augmenting paths in maximal matching algorithms, Our analysis and simulation shows that it yields satisfactory performance after comparing with the simple greedy algorithm. By generalizing this approach, we exploit the possibility of a class of greedy algorithms based on the maximal weighted matching heuristic","PeriodicalId":274390,"journal":{"name":"2006 Workshop on High Performance Switching and Routing","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115356614","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Integrating uni- and multicast scheduling in buffered crossbar switches 在缓冲交换机中集成单播和多播调度
2006 Workshop on High Performance Switching and Routing Pub Date : 2006-10-16 DOI: 10.1109/HPSR.2006.1709689
L. Mhamdi, S. Vassiliadis
{"title":"Integrating uni- and multicast scheduling in buffered crossbar switches","authors":"L. Mhamdi, S. Vassiliadis","doi":"10.1109/HPSR.2006.1709689","DOIUrl":"https://doi.org/10.1109/HPSR.2006.1709689","url":null,"abstract":"Internet traffic is a mixture of unicast and multicast flows. Integrated schedulers capable of dealing with both traffic types have been designed mainly for input queued (IQ) buffer-less crossbar switches. Combined input and crossbar queued (CICQ) switches, on the other hand, are known to have better performance than their buffer-less predecessors due to their potential in simplifying the scheduling and improving the switching performance. The design of integrated schedulers in CICQ switches has thus far been neglected. In this paper, we propose a novel CICQ architecture that supports both unicast and multicast traffic along with its appropriate scheduling. In particular, we propose an integrated round robin based scheduler that efficiently services both unicast and multicast traffic simultaneously. Our scheme, named multicast and unicast round robin scheduling (MURS), has been shown to outperform all existing schemes while keeping simple hardware requirements. Simulation results suggested that we can trade the size of the internal buffers for the number of input multicast queues","PeriodicalId":274390,"journal":{"name":"2006 Workshop on High Performance Switching and Routing","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126592712","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 17
Design of the scheduler for the high-capacity non-blocking packet switch 大容量无阻塞分组交换机调度程序的设计
2006 Workshop on High Performance Switching and Routing Pub Date : 2006-10-16 DOI: 10.1109/HPSR.2006.1709742
M. Petrovic, A. Smiljanic
{"title":"Design of the scheduler for the high-capacity non-blocking packet switch","authors":"M. Petrovic, A. Smiljanic","doi":"10.1109/HPSR.2006.1709742","DOIUrl":"https://doi.org/10.1109/HPSR.2006.1709742","url":null,"abstract":"The sequential greedy scheduling (SGS) is a scalable maximal matching algorithm that provides non-blocking in a packet switch with input buffers and a cross-bar. In this paper, we propose the design of the SGS scheduler, and present its FPGA implementation. We examine different design options and measure these implementations in terms of their scalability and speed. It will be shown that multiple input modules of a terabit packet switch can be implemented on one low-cost FPGA device and that the processing can be performed within desired time slot duration","PeriodicalId":274390,"journal":{"name":"2006 Workshop on High Performance Switching and Routing","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122147281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 12
An efficient packet scheduler for modern network processors: guarantee load balancing and packet ordering 现代网络处理器的高效数据包调度程序:保证负载平衡和数据包排序
2006 Workshop on High Performance Switching and Routing Pub Date : 2006-10-16 DOI: 10.1109/HPSR.2006.1709687
Xiaoming Zhang, Zhigang Sun, Minxuan Zhang
{"title":"An efficient packet scheduler for modern network processors: guarantee load balancing and packet ordering","authors":"Xiaoming Zhang, Zhigang Sun, Minxuan Zhang","doi":"10.1109/HPSR.2006.1709687","DOIUrl":"https://doi.org/10.1109/HPSR.2006.1709687","url":null,"abstract":"Multi-processors in modern network processors (NPs) are often organized as parallel processing elements (PEs) to achieve efficient packet forwarding for 10 Gbps high-speed links. It's a challenge to schedule the incoming packets from high-speed links to be processed by multiple PEs in parallel. In this paper, we present a novel packet scheduling scheme for 10 Gbps network processors, which satisfies both load balancing and in-order requirements in packet processing. Our Packet scheduler differentiates the types of IP packet flows and makes a different dispatching decision between TCP and non-TCP flows. Non-TCP flows are uniformly sprayed among different PEs. For TCP flows, packet scheduler maintains a two-stage indirect mapping table to cache the mapping relationship between different TCP flows and target PEs to guarantee packet-ordering within the same flows. Meanwhile, it uses a designed fuzzy feedback control loop (F2CL) to maintain load-balancing among PEs. The effectiveness of the packet scheduler with the well-chosen design parameters is evaluated by simulation with extrapolated workloads","PeriodicalId":274390,"journal":{"name":"2006 Workshop on High Performance Switching and Routing","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133870220","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A new heuristic algorithm for effective preemption in MPLS networks 一种用于MPLS网络有效抢占的启发式算法
2006 Workshop on High Performance Switching and Routing Pub Date : 2006-10-16 DOI: 10.1109/HPSR.2006.1709731
S. Kaczmarek, K. Nowak
{"title":"A new heuristic algorithm for effective preemption in MPLS networks","authors":"S. Kaczmarek, K. Nowak","doi":"10.1109/HPSR.2006.1709731","DOIUrl":"https://doi.org/10.1109/HPSR.2006.1709731","url":null,"abstract":"This paper gives a description of a new algorithm for preemption to be used in MPLS networks. It enables allocation of enabled network resources for a new path at the cost of removing one or more of the existing paths. The heuristic algorithm presented here selects paths to be removed, by using topology information. The method is based on an optimization function to achieve low band-width wastage on a network scale","PeriodicalId":274390,"journal":{"name":"2006 Workshop on High Performance Switching and Routing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129839848","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Capacity requirements for the facility backup option in MPLS fast reroute MPLS快速路由中设施备份选项的容量需求
2006 Workshop on High Performance Switching and Routing Pub Date : 2006-10-16 DOI: 10.1109/HPSR.2006.1709730
R. Martin, M. Menth, K. Canbolat
{"title":"Capacity requirements for the facility backup option in MPLS fast reroute","authors":"R. Martin, M. Menth, K. Canbolat","doi":"10.1109/HPSR.2006.1709730","DOIUrl":"https://doi.org/10.1109/HPSR.2006.1709730","url":null,"abstract":"MPLS fast reroute (MPLS-FRR) mechanisms deviate the traffic in case of network failures at the router which is closest to the outage location to achieve an extremely fast reaction time. We review the facility backup that is an option for MPLS-FRR that deviates the traffic via a bypass around the failed elements. Basically, the backup path can take the shortest path that avoids the outage location from the point of local repair to the merge point with the primary path. We suggest two new simple modifications that lead to a new path layout which can be implemented by the facility backup. We evaluate the backup capacity requirements, the length of the backup paths, and the number of backup paths in a parametric study regarding the network characteristics. Our proposals save a considerable amount of backup capacity compared to the standard mechanisms. They are suitable for application in practice since they are simple and conform to the standards","PeriodicalId":274390,"journal":{"name":"2006 Workshop on High Performance Switching and Routing","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123924708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 14
A self-adaptive threshold based scheduling algorithm for input-queued switches 一种基于自适应阈值的输入队列交换机调度算法
2006 Workshop on High Performance Switching and Routing Pub Date : 2006-10-16 DOI: 10.1109/HPSR.2006.1709741
Yuan Sun, Qingsheng Hu, Jiangtao Han, Zhigong Wang
{"title":"A self-adaptive threshold based scheduling algorithm for input-queued switches","authors":"Yuan Sun, Qingsheng Hu, Jiangtao Han, Zhigong Wang","doi":"10.1109/HPSR.2006.1709741","DOIUrl":"https://doi.org/10.1109/HPSR.2006.1709741","url":null,"abstract":"This paper presents a self-adaptive threshold based round-robin scheduling algorithm SATRR for input-queued switches. In SATRR, the matched input and output in certain cell time will be locked by two self-adaptive thresholds, whenever the queue length or the wait-time of the head cell in corresponding virtual output queue (VOQ) exceeds the thresholds. For a pair of locked input and output, they will be matched directly during succeeding cell times until unlocked. Particularly, by simultaneously employing the queue length threshold and the wait-time threshold which are updated every cell time, SATRR archives a good tradeoff between performance and hardware complexity. Simulation results indicate that the delay performance of SATRR is competitive when compared to other typical scheduling algorithms under various traffic patterns","PeriodicalId":274390,"journal":{"name":"2006 Workshop on High Performance Switching and Routing","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121941867","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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