2011 IEEE Sixth International Conference on Networking, Architecture, and Storage最新文献_第5页

Towards Scalable Application Checkpointing with Parallel File System Delegation 用并行文件系统委托实现可扩展的应用程序检查点

2011 IEEE Sixth International Conference on Networking, Architecture, and Storage Pub Date : 2011-07-28 DOI: 10.1109/NAS.2011.42

D. Arteaga, Ming Zhao

{"title":"Towards Scalable Application Checkpointing with Parallel File System Delegation","authors":"D. Arteaga, Ming Zhao","doi":"10.1109/NAS.2011.42","DOIUrl":"https://doi.org/10.1109/NAS.2011.42","url":null,"abstract":"The ever-increasing scale of modern high-performance computing (HPC) systems presents a variety of challenges to the parallel file system (PFS) based storage in these systems. The scalability of application check pointing is a particularly important challenge because it is critical to the reliability of computing and it often dominates the I/Os in a HPC system. When a large number of parallel processes simultaneously perform check pointing, the PFS metadata servers can become a serious bottleneck due to the large volume of concurrent metadata operations. This paper specifically addresses this PFS metadata management issue in order to support scalable application check pointing in large HPC systems. It proposes a new technique named PFS-delegation which delegates the management of the PFS storage space used for check pointing to applications, thereby relieving the load of metadata operations on the PFS during their check pointing. This proposed technique is prototyped on PVFS2, a widely used PFS implementation, and evaluated on a HPC cluster using a representative parallel I/O benchmark, IOR. Experiments with up to 128 parallel processes show that the PFS-delegation based check pointing is significantly faster than the traditional shared-file and file-per-process based check pointing methods (7% and 10% speedup when the underlying PVFS2 uses a centralized metadata server, 22% and 31% speedup when using distributed metadata servers). The results also demonstrate that the PFS-delegation based check pointing substantially reduces the total number of metadata operations handled by the metadata servers during the check pointing.","PeriodicalId":263887,"journal":{"name":"2011 IEEE Sixth International Conference on Networking, Architecture, and Storage","volume":"275 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116193412","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 7

Resource Discovery in Large Scale Network Infrastructure 大规模网络基础设施中的资源发现

2011 IEEE Sixth International Conference on Networking, Architecture, and Storage Pub Date : 2011-07-28 DOI: 10.1109/NAS.2011.43

Zhiming Zhao, Arie Taal, P. Grosso, C. D. Laat

引用次数: 3

An Efficient Shared Memory Based Virtual Communication System for Embedded SMP Cluster 基于共享内存的嵌入式SMP集群虚拟通信系统

2011 IEEE Sixth International Conference on Networking, Architecture, and Storage Pub Date : 2011-07-28 DOI: 10.1109/NAS.2011.16

Wen-jie Yin, Xiang Gao, Xiaojing Zhu, D. Guo

{"title":"An Efficient Shared Memory Based Virtual Communication System for Embedded SMP Cluster","authors":"Wen-jie Yin, Xiang Gao, Xiaojing Zhu, D. Guo","doi":"10.1109/NAS.2011.16","DOIUrl":"https://doi.org/10.1109/NAS.2011.16","url":null,"abstract":"With the prevalence of multi-core processors, it is a trend that the embedded cluster deploys SMP nodes to gain more computing power. As a crucial issue, the MPI inter-process communication has been suffering the contradiction between high performance and embedded constraints. Moreover, there is a big performance gap between intra- and inter-node communication for different infrastructures. In this paper, we design a virtual communication system called SMVN, which extends the shared memory mechanism typically used in intra-node case into the inter-node case. The SMVN utilizes the HT inter-chip interconnect interface in Godson-3A SMP nodes to build a mesh topology. It is Ethernet compatible by simulating bottom layers of TCP/IP protocol. With the design, the node interconnection can get rid of NICs, cables and switches. Furthermore, we exploit the zero-copy scheme and other optimizations to improve the performance. We port the MPICH2 library by socket channel and formulate its process allocation. The MPI latency and bandwidth tests show that the performance difference between two levels is small. The inter-node bandwidth is 27.3 MB/s, which is more than twice the theoretical peak value of 100 Mb Ethernet and reaches 84% of the intra-node performance.","PeriodicalId":263887,"journal":{"name":"2011 IEEE Sixth International Conference on Networking, Architecture, and Storage","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128301801","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

A Probabilistic Acknowledgment Mechanism for Wireless Sensor Networks 无线传感器网络的概率确认机制

2011 IEEE Sixth International Conference on Networking, Architecture, and Storage Pub Date : 2011-07-28 DOI: 10.1109/NAS.2011.38

M. Blagojevic, Majid Nabi, M. Geilen, T. Basten, T. Hendriks, M. Steine

{"title":"A Probabilistic Acknowledgment Mechanism for Wireless Sensor Networks","authors":"M. Blagojevic, Majid Nabi, M. Geilen, T. Basten, T. Hendriks, M. Steine","doi":"10.1109/NAS.2011.38","DOIUrl":"https://doi.org/10.1109/NAS.2011.38","url":null,"abstract":"The inherently unreliable communication infrastructure compel WSN protocols to employ error control mechanisms. Traditionally, error control is achieved by a retransmission scheme using acknowledgment mechanisms. WSN architectures are severely resource constrained and the additional energy expense of transmitting error control messages can seriously degrade network lifetime. In this paper, we analyze performance of error control schemes for the case of point-to-multipoint communication. An explicit acknowledgment mechanism may provide for reliable communication, but has two major drawbacks: 1) the over head is significant for small data messages, and 2) in case of asymmetrical communication links, multi-hop dissemination of acknowledgments is required. As an alternative to such explicit acknowledgment schemes we propose the use of probabilistic acknowledgments. In this probabilistic scheme, a sender estimates the probability that a message has been successfully delivered, based on information about the quality of the radio channel. A message is then retransmitted until the probability of successful delivery reaches a defined threshold value. Network capacity available for error control can be distributed prudently among all information items to be disseminated, possibly taking into account different application requirements. We formulate are transmission control strategy which results in minimal latency and maximal message delivery ratio.","PeriodicalId":263887,"journal":{"name":"2011 IEEE Sixth International Conference on Networking, Architecture, and Storage","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123035919","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 15

Performance Improvement for Multicore Processors Using Variable Page Technologies 使用可变页面技术改进多核处理器的性能

2011 IEEE Sixth International Conference on Networking, Architecture, and Storage Pub Date : 2011-07-28 DOI: 10.1109/NAS.2011.17

Xiaohui Zhang, Yifei Jiang, Ming Cong

{"title":"Performance Improvement for Multicore Processors Using Variable Page Technologies","authors":"Xiaohui Zhang, Yifei Jiang, Ming Cong","doi":"10.1109/NAS.2011.17","DOIUrl":"https://doi.org/10.1109/NAS.2011.17","url":null,"abstract":"In order to improve system performance, many modern processors support super page technology, which is also called variable page. It improves TLB coverage greatly without increasing TLB size. But supporting super page brings great challenge to operating systems. In this paper, we implement two variable page technologies, including the static variable page and dynamic variable page, in Linux kernel on Godson-3 four-core processors. The static variable page technology is implemented on the basis of hugetlbfs pseudo file system. The dynamic one chooses proper page sizes according to the address spaces of applications adaptively. Experiment results show that static variable page technology improves the performance of scientific applications such as large matrix multiplication significantly. The number of TLB misses is reduced by 99% and the speed of large-scale matrix multiplication is improved by over 50%. The dynamic self-adapting variable page technology can bring an average performance improvement of 15% to SPECCPU 2000 benchmarks. Compared with system of single large page (64KB), the file system performance of system supporting dynamic variable page is significantly improved by about 25%.","PeriodicalId":263887,"journal":{"name":"2011 IEEE Sixth International Conference on Networking, Architecture, and Storage","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121104090","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 0

Low Bitrate Asynchronous Replication of Block Devices and Virtual Machines 块设备和虚拟机的低比特率异步复制

2011 IEEE Sixth International Conference on Networking, Architecture, and Storage Pub Date : 2011-07-28 DOI: 10.1109/NAS.2011.46

A. Averbuch, Tomer Margalit, N. Zaidenberg, E. Khen

引用次数: 0

Matrix Odd-Even Partition: A High Power-Efficient Solution to the Small Grain Data Shuffle 矩阵奇偶划分:小粒度数据Shuffle的高效解决方案

2011 IEEE Sixth International Conference on Networking, Architecture, and Storage Pub Date : 2011-07-28 DOI: 10.1109/NAS.2011.29

Sheng Liu, Shuming Chen, Jianghua Wan, Haiyan Chen, Yaohua Wang

{"title":"Matrix Odd-Even Partition: A High Power-Efficient Solution to the Small Grain Data Shuffle","authors":"Sheng Liu, Shuming Chen, Jianghua Wan, Haiyan Chen, Yaohua Wang","doi":"10.1109/NAS.2011.29","DOIUrl":"https://doi.org/10.1109/NAS.2011.29","url":null,"abstract":"The shuffle operation is one of the bottlenecks invector DSPs. The partitioning problem of the shuffle matrix will have a great effect on the design of the shuffle unit, when dealing with the small grain data shuffle using a smaller-sized crossbar. The traditional matrix block partitioning solution will bring much chip area, power consumption and critical path delay. This paper presents a new matrix partitioning solution: the odd-even partition, which has advantages in dealing with the data going into or out of the shuffle network. It can simplify the hardware design and improve the power efficacy of the shuffle unit in vector DSPs, compared with the matrix block partitioning solution. The principles and theorems of the odd-even partition are explained and proofed. The shuffle unit based on the odd-even partition is implemented. Some contrastive experimental results show that the odd-even partitioning solution can decrease the critical path delay by 12.2%~21.6%, reduce the hardware area by 20.9%~40.8% and cut down the power consumption by 23.5%~56.8%, compared with the matrix block partitioning solution.","PeriodicalId":263887,"journal":{"name":"2011 IEEE Sixth International Conference on Networking, Architecture, and Storage","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123718174","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 1

Supporting Efficient Memory Conflicts Reduction Using the DMA Cache Technique in Vector DSPs 在矢量dsp中使用DMA缓存技术支持有效的内存冲突减少

2011 IEEE Sixth International Conference on Networking, Architecture, and Storage Pub Date : 2011-07-28 DOI: 10.1109/NAS.2011.28

Sheng Liu, Shuming Chen, Haiyan Chen, Shenggang Chen, Hu Chen

引用次数: 1