2022 IEEE/ACM International Workshop on Performance, Portability and Productivity in HPC (P3HPC)最新文献

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Exploiting dynamic sparse matrices for performance portable linear algebra operations 利用动态稀疏矩阵实现可移植线性代数运算

2022 IEEE/ACM International Workshop on Performance, Portability and Productivity in HPC (P3HPC) Pub Date : 2022-09-14 DOI: 10.1109/P3HPC56579.2022.00010

Christodoulos Stylianou, M. Weiland

{"title":"Exploiting dynamic sparse matrices for performance portable linear algebra operations","authors":"Christodoulos Stylianou, M. Weiland","doi":"10.1109/P3HPC56579.2022.00010","DOIUrl":"https://doi.org/10.1109/P3HPC56579.2022.00010","url":null,"abstract":"Sparse matrices and linear algebra are at the heart of scientific simulations. More than 70 sparse matrix storage formats have been developed over the years, targeting a wide range of hardware architectures and matrix types. Each format is developed to exploit the particular strengths of an architecture, or the specific sparsity patterns of matrices, and the choice of the right format can be crucial in order to achieve optimal performance. The adoption of dynamic sparse matrices that can change the underlying data-structure to match the computation at runtime without introducing prohibitive overheads has the potential of optimizing performance through dynamic format selection.In this paper, we introduce Morpheus, a library that provides an efficient abstraction for dynamic sparse matrices. The adoption of dynamic matrices aims to improve the productivity of developers and end-users who do not need to know and understand the implementation specifics of the different formats available, but still want to take advantage of the optimization opportunity to improve the performance of their applications. We demonstrate that by porting HPCG to use Morpheus, and without further code changes, 1) HPCG can now target heterogeneous environments and 2) the performance of the Sparse Matrix-Vector Multiplication (SpMV) kernel is improved up to 2.5× and 7× on CPUs and GPUs respectively, through runtime selection of the best format on each MPI process.","PeriodicalId":261766,"journal":{"name":"2022 IEEE/ACM International Workshop on Performance, Portability and Productivity in HPC (P3HPC)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-09-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127900621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

ECP SOLLVE: Validation and Verification Testsuite Status Update and Compiler Insight for OpenMP ECP solve: OpenMP的验证和验证测试套件状态更新和编译器洞察力

2022 IEEE/ACM International Workshop on Performance, Portability and Productivity in HPC (P3HPC) Pub Date : 2022-08-28 DOI: 10.1109/P3HPC56579.2022.00017

Thomas Huber, S. Pophale, Nolan Baker, M. Carr, N. Rao, Jaydon Reap, Kristina Holsapple, J. H. Davis, T. Burnus, Seyong Lee, D. Bernholdt, S. Chandrasekaran

{"title":"ECP SOLLVE: Validation and Verification Testsuite Status Update and Compiler Insight for OpenMP","authors":"Thomas Huber, S. Pophale, Nolan Baker, M. Carr, N. Rao, Jaydon Reap, Kristina Holsapple, J. H. Davis, T. Burnus, Seyong Lee, D. Bernholdt, S. Chandrasekaran","doi":"10.1109/P3HPC56579.2022.00017","DOIUrl":"https://doi.org/10.1109/P3HPC56579.2022.00017","url":null,"abstract":"The OpenMP language continues to evolve with every new specification release, as does the need to validate and verify the new features that have been implemented by the different vendors. With the release of OpenMP 5.0 and OpenMP 5.1, new target offload and host-based features have been introduced to the programming model. While OpenMP continues to grow in maturity, there is an observable growth in the number of compiler and hardware vendors that support OpenMP. In this manuscript, the main focus is on evaluating the conformity and OpenMP implementation progress of various compiler vendors such as Cray, IBM, GNU, Clang/LLVM, NVIDIA, and Intel. More specifically, the 4.5, 5.0, and 5.1 versions of the OpenMP specification are analyzed. For our experimental setup, the Crusher and Summit computing systems hosted by Oak Ridge National Lab’s Computing Facilities are utilized. The effort of vendor agnostic analysis of these implementations is especially valuable for application developers who are using new OpenMP features to accelerate their scientific codes. Insights are presented into the current implementation status of various vendors, the progression of specific compiler’s support for OpenMP overtime, the subset of OpenMP 4.5, 5.0, and 5.1 that is supported by all compilers, and examples of how our test suite has influenced discussion regarding the correct interpretation of the OpenMP specification. By evaluating OpenMP conformity of pre-Exascale computing systems, the aim is to detail progress and status of AMD + Cray ecosystem before the system and their OpenMP implementation is used for mission critical applications when the first Exascale Computer Frontier is made available to applications.","PeriodicalId":261766,"journal":{"name":"2022 IEEE/ACM International Workshop on Performance, Portability and Productivity in HPC (P3HPC)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127044807","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 3

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