{"title":"Design objectives for the IBM stretch computer","authors":"S. Dunwell","doi":"10.1145/1455533.1455540","DOIUrl":"https://doi.org/10.1145/1455533.1455540","url":null,"abstract":"It is apparent to every user of an electronic computer that there are areas in which major improvements are desired. Present computer speeds, remarkable as they are, still fall short of the requirements of many of today's business and technical applications. The labor of programming often delays or prevents the application of new problems to the machines. Maintenance continues to consume a significant fraction of the working day, and requires highly skilled engineers to locate and repair machine faults.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123119430","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A 2.5-megacycle ferractor accumulator","authors":"R. Torrey, T. Bonn","doi":"10.1145/1455533.1455546","DOIUrl":"https://doi.org/10.1145/1455533.1455546","url":null,"abstract":"Investigations of magnetic amplifiers at high frequencies indicate that reliable operation with a power gain of about three or four is possible at an information frequency of 2.5 megacycles using series pulse-type magnetic amplifiers. A unit employing several cores was constructed in order to gain experience in packaging and with operating problems at this frequency. Before going into a description of the unit itself a short explanation of the operation of the magnetic cores is given.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"215 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132213836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"High-speed transistor computer circuit design","authors":"R. Henle","doi":"10.1145/1455533.1455549","DOIUrl":"https://doi.org/10.1145/1455533.1455549","url":null,"abstract":"The realization of the computer described by S. W. Dunwell calls for high-frequency circuits capable of passing a signal through five sequential logical stages in 100 millimicroseconds. At the start of the project a study of available devices and techniques indicated that this goal would be difficult to reach without significant improvements either in the devices or the circuits, or both. Such an improvement came about in the device area with the availability of drift type transistors for research work. The characteristics of these transistors made necessary a new approach to circuit design which has resulted in circuits which not only meet the speed requirements, but also are relatively simple, reliable, and insensitive to noise.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124604541","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A large-capacity drum-file memory system","authors":"H. Welsh, V. Porter","doi":"10.1145/1455533.1455564","DOIUrl":"https://doi.org/10.1145/1455533.1455564","url":null,"abstract":"Synopsis: The magnetic drum-file memory system described in this paper was designed for the Univac-Larc computing system as storage that would be intermediate in speed and in capacity between the Uniservo magnetic tapes and the ultra high-speed magnetic-core memory. Although designed for Univac-Larc, the drum-file memory system may be used for any type of systematic data processing where extremely short access time is not required and economy is an important consideration. Economy is achieved through the use of a single flying head, which can move parallel to the axis of the drum and perform the read-write operations for the entire drum. This arrangement eliminates the need for close mechanical tolerances and elaborate switching devices. The drum-file memory may also be used as a random-access device where a delay of a second or two is not critical, as, for example, in checking a particular item of an inventory.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124777474","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Automatic input for business data-processing systems","authors":"K. R. Eldredge, F. J. Kamphoefner, P. Wendt","doi":"10.1145/1455533.1455551","DOIUrl":"https://doi.org/10.1145/1455533.1455551","url":null,"abstract":"Synopsis: Computers for business applications are generally input limited and require excessive manpower for data preparation. This can be reduced, and gains can be made in speed and reliability if the data forms for the computer and the human being are compatible. Documents must be prepared for manual use in conjunction with many phases of automatic business or technical data handling, and such documents with suitable format arrangements can be fed directly to the computer input with the techniques described. The numbers and symbols on the document are printed in magnetic ink in conventional form and size, and machine reading can be accomplished at rates exceeding 5,000 characters per second. The documents themselves have been handled at rates up to 50 per second.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121174558","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Quasi-random access memory systems","authors":"G. L. Hollander","doi":"10.1145/1455533.1455563","DOIUrl":"https://doi.org/10.1145/1455533.1455563","url":null,"abstract":"Synopsis: To select an economical memory for business data-processing systems, the memory characteristics must be matched to the work cycle, processing rate, and permissible delay time of the system. Quasi-random systems feature the low memory cost of serial memories, high processing rates, short delay times, and minimum sorting. An efficient addressing method and rapid cross references reduce the total storage requirements. Typical business examples illustrate the principles.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123095979","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A saturable-transformer digital amplifier with diode switching","authors":"E. W. Hogue","doi":"10.1145/1455533.1455548","DOIUrl":"https://doi.org/10.1145/1455533.1455548","url":null,"abstract":"Synopsis: A digital amplifier of simple non-critical design incorporating a saturable voltage transformer is described. The clock is a 2-phase, sine-wave voltage source in the 100-kc range. In structure and mode of operation the amplifier stage is particularly suited for use with 2-level diode gating to provide the \"and\" and \"or\" logical functions. A complementer employing two saturable transformers provides the \"not\" function. The volt-second transfer characteristic of the stage critically determines the stability of transmission of binary signals in a long register, or in any closed loop. Factors governing the shape of this characteristic are discussed. The over-all characteristic for n stages is then derived and used to predict binary transmission stability.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120945038","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Synchronization of a magnetic computer","authors":"J. Kielsohn, G. Smoliar","doi":"10.1145/1455533.1455555","DOIUrl":"https://doi.org/10.1145/1455533.1455555","url":null,"abstract":"In computer design the problem of communication between the central computer and the outside world is always present. This paper describes how this problem was solved for the Cambridge computer with a new type of shift register employing the Ferractor*, the magnetic core developed by Remington Rand Univac. The computer and the magnetic amplifiers which it uses were described in some detail in other papers. The shift register itself has many unique features, however, and the design and application merit a separate discussion.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"2015 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133508148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"A transistorized transcribing card punch","authors":"C. T. Cole, K. Chien, C. H. Propster","doi":"10.1145/1455533.1455553","DOIUrl":"https://doi.org/10.1145/1455533.1455553","url":null,"abstract":"The RCA (Radio Corporation of America) BIZMAC Transistorized Transcribing Card Punch described in this paper provides a means for converting large volumes of data stored on magnetic tape in the Bizmac code into characters punched on electronic accounting machine cards using the IBM (International Business Machines Corporation) code. This output device will transcribe information at the rate of 150 cards per minute, and provides accuracy control features to assure correct data punching. The functional operation of the transcribing card punch is compatible with the Bizmac system and with general punched-card system requirements as well.","PeriodicalId":259150,"journal":{"name":"AIEE-IRE '56 (Eastern)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1899-12-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127132100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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