Proceedings of the 19th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems最新文献

筛选

英文中文

Decoupling address generation from loads and stores to improve data access energy efficiency 从负载和存储中解耦地址生成，以提高数据访问能效

Proceedings of the 19th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems Pub Date : 2018-06-19 DOI: 10.1145/3211332.3211340

Michael Stokes, Ryan Baird, Zhaoxiang Jin, D. Whalley, Soner Önder

{"title":"Decoupling address generation from loads and stores to improve data access energy efficiency","authors":"Michael Stokes, Ryan Baird, Zhaoxiang Jin, D. Whalley, Soner Önder","doi":"10.1145/3211332.3211340","DOIUrl":"https://doi.org/10.1145/3211332.3211340","url":null,"abstract":"Level-one data cache (L1 DC) accesses impact energy usage as they frequently occur and use significantly more energy than register file accesses. A memory access instruction consists of an address generation operation calculating the location where the data item resides in memory and the data access operation that loads/stores a value from/to that location. We propose to decouple these two operations into separate machine instructions to reduce energy usage. By associating the data translation lookaside buffer (DTLB) access and level-one data cache (L1 DC) tag check with an address generation instruction, only a single data array in a set-associative L1 DC needs to be accessed during a load instruction when the result of the tag check is known at that point. In addition, many DTLB accesses and L1 DC tag checks are avoided by memoizing the DTLB way and L1 DC way with the register that holds the memory address to be dereferenced. Finally, we are able to often coalesce an ALU operation with a load or store data access using our technique to reduce the number of instructions executed.","PeriodicalId":258348,"journal":{"name":"Proceedings of the 19th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132459482","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 2

Transparent standby for low-power, resource-constrained embedded systems: a programming language-based approach (short WIP paper) 低功耗、资源受限嵌入式系统的透明待机:一种基于编程语言的方法(短WIP论文)

Proceedings of the 19th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems Pub Date : 2018-06-19 DOI: 10.1145/3211332.3211337

Francisco Sant'anna, Alexandre Sztajnberg, A. Moura, N. Rodrigues

引用次数: 0

A memory-bounded, deterministic and terminating semantics for the synchronous programming language Céu 同步编程语言catia的内存受限、确定性和终止语义

Proceedings of the 19th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems Pub Date : 2018-06-19 DOI: 10.1145/3211332.3211334

R. C. M. Santos, Guilherme Lima, Francisco Sant'anna, R. Ierusalimschy, E. Haeusler

引用次数: 8

首页上一页