2009 52nd IEEE International Midwest Symposium on Circuits and Systems最新文献_第9页

Delay-compensation techniques for ultra-low-power subthreshold CMOS digital LSIs 超低功耗亚阈值CMOS数字lsi的延迟补偿技术

2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5236044

Yuji Osaki, T. Hirose, K. Matsumoto, N. Kuroki, M. Numa

引用次数: 12

Low power implementation of DCT for on-board satellite image processing systems 星载卫星图像处理系统DCT的低功耗实现

2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5235883

S. Vijay, D. Anchit

引用次数: 1

The transient response of a Duffing resonator following a parameter change 杜芬谐振器在参数变化后的瞬态响应

2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5235887

Chenchen Deng, S. Collins

引用次数: 4

A theoretical exposition to apply the lamda methodology to vector quantization 一个理论的阐述，应用lamda方法矢量量化

2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5235988

E. Guzmán, J. G. Zambrano, A. Orantes, O. Pogrebnyak

{"title":"A theoretical exposition to apply the lamda methodology to vector quantization","authors":"E. Guzmán, J. G. Zambrano, A. Orantes, O. Pogrebnyak","doi":"10.1109/MWSCAS.2009.5235988","DOIUrl":"https://doi.org/10.1109/MWSCAS.2009.5235988","url":null,"abstract":"Vector quantization is a method, used in the lossy compression of voice and images, which can produce results very near to the theoretical limits; however, its principal disadvantage is that the process of search based its functioning on an algorithm of total search, generating a slow process and of a complexity computacional considerable. The present work proposes the combination of two algorithms in the creation of a new vector quantization scheme. First, an associative network is obtained applying a Learning Algorithm for Multivariate Data Analysis (LAMDA) to a codebook generated by means of the LBG algorithm, the purpose of this network is to establish a relation between the training set and the codebook generated by the LBG algorithm; this associative network is a new codebook (LAMDA-codebook) used by the scheme proposed in this work (VQ-LAMDA). Second, considering the LAMDA-codebook as the central element, we use the classification phase of the LAMDA methodology to obtain a rapid search process; the function of this process is generate the set of the class indexes to which every input vector belongs, completing the vector quantization. Furthermore, it is described how to apply the vector quantization scheme proposed to image compression.","PeriodicalId":254577,"journal":{"name":"2009 52nd IEEE International Midwest Symposium on Circuits and Systems","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123032321","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 4

A type III fast locking time PLL with transconductor-C structure 一种III型快速锁相环，具有跨导体c结构

2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5236152

Habib Adrang, H. Naeimi

引用次数: 6

Power aware combination of transposed-form and direct-form FIR polyphase decimators for Sigma-Delta ADCs 用于Sigma-Delta adc的转置形式和直接形式FIR多相抽取器的功率感知组合

2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5236021

A. Shahein, M. Becker, N. Lotze, Y. Manoli

引用次数: 2

An oversampling digital pixel sensor with a charge transfer DAC employing parasitic capacitances 一种过采样数字像素传感器，具有采用寄生电容的电荷转移DAC

2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5236066

D. Maricic, Z. Ignjatovic, M. Bocko

{"title":"An oversampling digital pixel sensor with a charge transfer DAC employing parasitic capacitances","authors":"D. Maricic, Z. Ignjatovic, M. Bocko","doi":"10.1109/MWSCAS.2009.5236066","DOIUrl":"https://doi.org/10.1109/MWSCAS.2009.5236066","url":null,"abstract":"An image sensor design with pixel-level sigma-delta (ΣΔ) conversion employing four transistors at each pixel where the feedback charge transfer is realized through the parasitic capacitances of an inactive transistor is presented. This architecture is a relatively simple and robust design where the only analog components required outside of the pixel array are shared row comparators and a voltage mode digital-to-analog converter (DAC) to supply the in-pixel charge feedback structures. The photodiode acts as the integrator of the ΣΔ modulator and an in-pixel charge feedback DAC is realized with two PMOS transistors. A third, minimum size PMOS transistor operating in the cut-off region provides capacitive coupling through which a controlled amount of charge is injected to the photodiode. The sensitivity of the image sensor is determined by the size of the feedback charge packets in the ΣΔ modulator. The remainder of the image sensor is all digital, including a decimation filter to convert each pixel's single bit output stream into a multi-bit sample. We fabricated a test pixel structure in the TSMC-0.35µm CMOS technology with 10µm × 10µm pixels and a fill factor of 31%. Experimental results demonstrated a SNR of 60dB and a dynamic range of 83dB.","PeriodicalId":254577,"journal":{"name":"2009 52nd IEEE International Midwest Symposium on Circuits and Systems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-09-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116329217","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}

引用次数: 5

Network forensics with Neurofuzzy techniques 神经模糊技术的网络取证

2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5235900

Eleazar Aguirre Anaya, M. Nakano-Miyatake, H. Meana

引用次数: 10

Stabilization of high-order systems with delay using a predictor schema 基于预测模式的高阶时滞系统镇定

2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5236087

Y. Pedraza-Beltran, O. Gonzalez-Nagera, B. del Muro-Cuéllar

引用次数: 15

Current-mode DC-DC buck converter with reliable hysteretic-mode control and dual modulator for fast dynamic voltage scaling 电流型DC-DC降压变换器，具有可靠的滞回模式控制和双调制器，用于快速动态电压缩放

2009 52nd IEEE International Midwest Symposium on Circuits and Systems Pub Date : 2009-09-15 DOI: 10.1109/MWSCAS.2009.5235921

Jungmoon Kim, Hyunho Chu, Chulwoo Kim

引用次数: 8