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2013 IEEE Hot Chips 25 Symposium (HCS)最新文献

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Automatic number plate recognition system on an ARM-DSP and FPGA heterogeneous SoC platforms 基于ARM-DSP和FPGA异构SoC平台的车牌自动识别系统
2013 IEEE Hot Chips 25 Symposium (HCS) Pub Date : 2013-08-27 DOI: 10.1109/HOTCHIPS.2013.7478331
Z. Jeffrey, X. Zhai, F. Bensaali, R. Sotudeh, A. Ariyaeeinia
{"title":"Automatic number plate recognition system on an ARM-DSP and FPGA heterogeneous SoC platforms","authors":"Z. Jeffrey, X. Zhai, F. Bensaali, R. Sotudeh, A. Ariyaeeinia","doi":"10.1109/HOTCHIPS.2013.7478331","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2013.7478331","url":null,"abstract":"The ARM-DSP based ANPR system described is designed for commercial applications where the need for low power, low prices and real time systems is vital. A single FPGA can also be added as a plug-in to the ARM-DSP based hardware SoC, depending on the extra resources needed for the application. The overall results have shown that it is possible to use cheaper off-the-shelf ARM-DSPs and FPGAs multicore processors for standalone ANPR systems through device and algorithm optimisation to achieve real-time performance at higher recognition rate using efficient algorithms.","PeriodicalId":253292,"journal":{"name":"2013 IEEE Hot Chips 25 Symposium (HCS)","volume":"456 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-08-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125798048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
The chip design game at the end of Moore's law 摩尔定律末期的芯片设计游戏
2013 IEEE Hot Chips 25 Symposium (HCS) Pub Date : 2013-08-01 DOI: 10.1109/HOTCHIPS.2013.7478302
R. Colwell
{"title":"The chip design game at the end of Moore's law","authors":"R. Colwell","doi":"10.1109/HOTCHIPS.2013.7478302","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2013.7478302","url":null,"abstract":"","PeriodicalId":253292,"journal":{"name":"2013 IEEE Hot Chips 25 Symposium (HCS)","volume":"295 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117148438","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
HSA memory model HSA记忆模型
2013 IEEE Hot Chips 25 Symposium (HCS) Pub Date : 2013-08-01 DOI: 10.1109/HOTCHIPS.2013.7478288
Benedict R. Gaster
{"title":"HSA memory model","authors":"Benedict R. Gaster","doi":"10.1109/HOTCHIPS.2013.7478288","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2013.7478288","url":null,"abstract":"The HSA architecture has adopted a variant of the HRF-Relaxed memory model, which allows memory accesses to be controlled via fine grain scopes. This chapter introduces the HSA memory consistency model, how programmers can control memory visibility, and touches how programming languages like OpenCL and C++ can be represented.","PeriodicalId":253292,"journal":{"name":"2013 IEEE Hot Chips 25 Symposium (HCS)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116466322","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
Flash trends: Challenges and future Flash趋势:挑战和未来
2013 IEEE Hot Chips 25 Symposium (HCS) Pub Date : 2013-08-01 DOI: 10.1109/HOTCHIPS.2013.7478297
John D. Davis, Laura Caulfield, S. Swanson
{"title":"Flash trends: Challenges and future","authors":"John D. Davis, Laura Caulfield, S. Swanson","doi":"10.1109/HOTCHIPS.2013.7478297","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2013.7478297","url":null,"abstract":"Presents a collection of slides covering the following topics: NAND flash memory; flash drives; SLC memory; and MLC memory.","PeriodicalId":253292,"journal":{"name":"2013 IEEE Hot Chips 25 Symposium (HCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122811369","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Flash in an enterprise storage array - 10x performance for less than disk 企业存储阵列中的闪存-性能比磁盘低10倍
2013 IEEE Hot Chips 25 Symposium (HCS) Pub Date : 2013-08-01 DOI: 10.1109/HOTCHIPS.2013.7478296
Neil Vachharajani
{"title":"Flash in an enterprise storage array - 10x performance for less than disk","authors":"Neil Vachharajani","doi":"10.1109/HOTCHIPS.2013.7478296","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2013.7478296","url":null,"abstract":"Presents a collection of slides covering the following topics: enterprise storage array; Pure Storage flash array; solid-state drives; and DRAM.","PeriodicalId":253292,"journal":{"name":"2013 IEEE Hot Chips 25 Symposium (HCS)","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114248278","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
4th generation Intel™ Core processor, codenamed Haswell 第四代英特尔™酷睿处理器，代号Haswell
2013 IEEE Hot Chips 25 Symposium (HCS) Pub Date : 2013-08-01 DOI: 10.1109/HOTCHIPS.2013.7478321
Per Hammarlund
{"title":"4th generation Intel™ Core processor, codenamed Haswell","authors":"Per Hammarlund","doi":"10.1109/HOTCHIPS.2013.7478321","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2013.7478321","url":null,"abstract":"","PeriodicalId":253292,"journal":{"name":"2013 IEEE Hot Chips 25 Symposium (HCS)","volume":"182 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124579186","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 39
5th generation touchscreen controller for mobile phones and tablets 第五代触摸屏控制器，适用于手机和平板电脑
2013 IEEE Hot Chips 25 Symposium (HCS) Pub Date : 2013-08-01 DOI: 10.1109/HOTCHIPS.2013.7478319
M. Ribeiro, John Carey
{"title":"5th generation touchscreen controller for mobile phones and tablets","authors":"M. Ribeiro, John Carey","doi":"10.1109/HOTCHIPS.2013.7478319","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2013.7478319","url":null,"abstract":"","PeriodicalId":253292,"journal":{"name":"2013 IEEE Hot Chips 25 Symposium (HCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124180274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
What a fast FPU means for algorithms: A story of vector elementary functions 快速的FPU对算法意味着什么:一个关于向量初等函数的故事
2013 IEEE Hot Chips 25 Symposium (HCS) Pub Date : 2013-08-01 DOI: 10.1109/HOTCHIPS.2013.7478327
Marat Dukhan
{"title":"What a fast FPU means for algorithms: A story of vector elementary functions","authors":"Marat Dukhan","doi":"10.1109/HOTCHIPS.2013.7478327","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2013.7478327","url":null,"abstract":"Presents a collection of slides covering the following topics: Vector Elementary Functions; FLOPS; and FPU.","PeriodicalId":253292,"journal":{"name":"2013 IEEE Hot Chips 25 Symposium (HCS)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121662346","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
AMD "kabini" APU SOC
2013 IEEE Hot Chips 25 Symposium (HCS) Pub Date : 2013-08-01 DOI: 10.1109/HOTCHIPS.2013.7478299
Dan Bouvier, B. Bates, Walter Fry, Sreekanth Godey
{"title":"AMD \"kabini\" APU SOC","authors":"Dan Bouvier, B. Bates, Walter Fry, Sreekanth Godey","doi":"10.1109/HOTCHIPS.2013.7478299","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2013.7478299","url":null,"abstract":"","PeriodicalId":253292,"journal":{"name":"2013 IEEE Hot Chips 25 Symposium (HCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129529523","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Delivering the full potential of PCIe storage 充分发挥PCIe存储的潜力
2013 IEEE Hot Chips 25 Symposium (HCS) Pub Date : 2013-08-01 DOI: 10.1109/HOTCHIPS.2013.7478293
A. Huffman
{"title":"Delivering the full potential of PCIe storage","authors":"A. Huffman","doi":"10.1109/HOTCHIPS.2013.7478293","DOIUrl":"https://doi.org/10.1109/HOTCHIPS.2013.7478293","url":null,"abstract":"Presents a collection of slides covering the following topics: PCIe Storage; SSD; NVM; Host Controller Interface; and NonVolatile Memory.","PeriodicalId":253292,"journal":{"name":"2013 IEEE Hot Chips 25 Symposium (HCS)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128572083","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
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